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fix: Set LF line endings for assembly files

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This commit is contained in:
MADAO-LUV
2025-06-04 21:29:32 +08:00
commit 6727ac58d0
293 changed files with 212138 additions and 0 deletions
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458
MDK-ARM/.vscode/c_cpp_properties.json vendored Normal file
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@@ -0,0 +1,458 @@
{
"configurations": [
{
"name": "AutoGuideStick",
"includePath": [
"d:\\advance_stick\\AutoGuideStick\\Core\\Inc",
"d:\\advance_stick\\AutoGuideStick\\AZURE_RTOS\\App",
"d:\\advance_stick\\AutoGuideStick\\Drivers\\STM32H5xx_HAL_Driver\\Inc",
"d:\\advance_stick\\AutoGuideStick\\Drivers\\STM32H5xx_HAL_Driver\\Inc\\Legacy",
"d:\\advance_stick\\AutoGuideStick\\Middlewares\\ST\\threadx\\common\\inc",
"d:\\advance_stick\\AutoGuideStick\\Drivers\\CMSIS\\Device\\ST\\STM32H5xx\\Include",
"d:\\advance_stick\\AutoGuideStick\\Middlewares\\ST\\threadx\\ports\\cortex_m33\\ac6\\inc",
"d:\\advance_stick\\AutoGuideStick\\Drivers\\CMSIS\\Include",
"D:\\keil5\\ARM\\ARMCLANG\\include",
"D:\\keil5\\ARM\\ARMCLANG\\include\\arm_linux",
"D:\\keil5\\ARM\\ARMCLANG\\include\\arm_linux_compat",
"D:\\keil5\\ARM\\ARMCLANG\\include\\libcxx",
"d:\\advance_stick\\AutoGuideStick\\MDK-ARM",
"d:\\advance_stick\\AutoGuideStick\\Core\\Src",
"d:\\advance_stick\\AutoGuideStick\\Drivers\\STM32H5xx_HAL_Driver\\Src",
"d:\\advance_stick\\AutoGuideStick\\Middlewares\\ST\\threadx\\common\\src",
"d:\\advance_stick\\AutoGuideStick\\Middlewares\\ST\\threadx\\ports\\cortex_m33\\ac6\\src"
],
"defines": [
"TX_INCLUDE_USER_DEFINE_FILE",
"TX_SINGLE_MODE_NON_SECURE=1",
"USE_HAL_DRIVER",
"STM32H563xx",
"__alignof__(x)=",
"__asm(x)=",
"__asm__(x)=",
"__forceinline=",
"__restrict=",
"__volatile__=",
"__inline=",
"__inline__=",
"__declspec(x)=",
"__attribute__(x)=",
"__nonnull__(x)=",
"__unaligned=",
"__promise(x)=",
"__irq=",
"__swi=",
"__weak=",
"__register=",
"__pure=",
"__value_in_regs=",
"__breakpoint(x)=",
"__current_pc()=0U",
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"__disable_irq()=",
"__enable_fiq()=",
"__enable_irq()=",
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"__memory_changed()=",
"__schedule_barrier()=",
"__semihost(x,y)=0",
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"__builtin_arm_wfi()=",
"__builtin_arm_wfe()=",
"__builtin_arm_sev()=",
"__builtin_arm_sevl()=",
"__builtin_arm_yield()=",
"__builtin_arm_isb(x)=",
"__builtin_arm_dsb(x)=",
"__builtin_arm_dmb(x)=",
"__builtin_bswap32(x)=0U",
"__builtin_bswap16(x)=0U",
"__builtin_arm_rbit(x)=0U",
"__builtin_clz(x)=0U",
"__builtin_arm_ldrex(x)=0U",
"__builtin_arm_strex(x,y)=0U",
"__builtin_arm_clrex()=",
"__builtin_arm_ssat(x,y)=0U",
"__builtin_arm_usat(x,y)=0U",
"__builtin_arm_ldaex(x)=0U",
"__builtin_arm_stlex(x,y)=0U",
"_ILP32=1",
"_USE_STATIC_INLINE=1",
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"__ARM_TARGET_COPROC=1",
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"__ATOMIC_ACQ_REL=4",
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"__CHAR16_TYPE__=unsigned short",
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"__FPCLASS_NEGINF=0x0004",
"__FPCLASS_NEGNORMAL=0x0008",
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"__FPCLASS_NEGZERO=0x0020",
"__FPCLASS_POSINF=0x0200",
"__FPCLASS_POSNORMAL=0x0100",
"__FPCLASS_POSSUBNORMAL=0x0080",
"__FPCLASS_POSZERO=0x0040",
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"__FPCLASS_SNAN=0x0001",
"__GCC_ATOMIC_BOOL_LOCK_FREE=1",
"__GCC_ATOMIC_CHAR16_T_LOCK_FREE=1",
"__GCC_ATOMIC_CHAR32_T_LOCK_FREE=1",
"__GCC_ATOMIC_CHAR_LOCK_FREE=1",
"__GCC_ATOMIC_INT_LOCK_FREE=1",
"__GCC_ATOMIC_LLONG_LOCK_FREE=1",
"__GCC_ATOMIC_LONG_LOCK_FREE=1",
"__GCC_ATOMIC_POINTER_LOCK_FREE=1",
"__GCC_ATOMIC_SHORT_LOCK_FREE=1",
"__GCC_ATOMIC_TEST_AND_SET_TRUEVAL=1",
"__GCC_ATOMIC_WCHAR_T_LOCK_FREE=1",
"__GNUC_MINOR__=2",
"__GNUC_PATCHLEVEL__=1",
"__GNUC_STDC_INLINE__=1",
"__GNUC__=4",
"__GXX_ABI_VERSION=1002",
"__ILP32__=1",
"__INT16_C_SUFFIX__=",
"__INT16_FMTd__=\"hd\"",
"__INT16_FMTi__=\"hi\"",
"__INT16_MAX__=32767",
"__INT16_TYPE__=short",
"__INT32_C_SUFFIX__=",
"__INT32_FMTd__=\"d\"",
"__INT32_FMTi__=\"i\"",
"__INT32_MAX__=2147483647",
"__INT32_TYPE__=int",
"__INT64_C_SUFFIX__=LL",
"__INT64_FMTd__=\"lld\"",
"__INT64_FMTi__=\"lli\"",
"__INT64_MAX__=9223372036854775807LL",
"__INT64_TYPE__=long long int",
"__INT8_C_SUFFIX__=",
"__INT8_FMTd__=\"hhd\"",
"__INT8_FMTi__=\"hhi\"",
"__INT8_MAX__=127",
"__INT8_TYPE__=signed char",
"__INTMAX_C_SUFFIX__=LL",
"__INTMAX_FMTd__=\"lld\"",
"__INTMAX_FMTi__=\"lli\"",
"__INTMAX_MAX__=9223372036854775807LL",
"__INTMAX_TYPE__=long long int",
"__INTMAX_WIDTH__=64",
"__INTPTR_FMTd__=\"d\"",
"__INTPTR_FMTi__=\"i\"",
"__INTPTR_MAX__=2147483647",
"__INTPTR_TYPE__=int",
"__INTPTR_WIDTH__=32",
"__INT_FAST16_FMTd__=\"hd\"",
"__INT_FAST16_FMTi__=\"hi\"",
"__INT_FAST16_MAX__=32767",
"__INT_FAST16_TYPE__=short",
"__INT_FAST16_WIDTH__=16",
"__INT_FAST32_FMTd__=\"d\"",
"__INT_FAST32_FMTi__=\"i\"",
"__INT_FAST32_MAX__=2147483647",
"__INT_FAST32_TYPE__=int",
"__INT_FAST32_WIDTH__=32",
"__INT_FAST64_FMTd__=\"lld\"",
"__INT_FAST64_FMTi__=\"lli\"",
"__INT_FAST64_MAX__=9223372036854775807LL",
"__INT_FAST64_TYPE__=long long int",
"__INT_FAST64_WIDTH__=64",
"__INT_FAST8_FMTd__=\"hhd\"",
"__INT_FAST8_FMTi__=\"hhi\"",
"__INT_FAST8_MAX__=127",
"__INT_FAST8_TYPE__=signed char",
"__INT_FAST8_WIDTH__=8",
"__INT_LEAST16_FMTd__=\"hd\"",
"__INT_LEAST16_FMTi__=\"hi\"",
"__INT_LEAST16_MAX__=32767",
"__INT_LEAST16_TYPE__=short",
"__INT_LEAST16_WIDTH__=16",
"__INT_LEAST32_FMTd__=\"d\"",
"__INT_LEAST32_FMTi__=\"i\"",
"__INT_LEAST32_MAX__=2147483647",
"__INT_LEAST32_TYPE__=int",
"__INT_LEAST32_WIDTH__=32",
"__INT_LEAST64_FMTd__=\"lld\"",
"__INT_LEAST64_FMTi__=\"lli\"",
"__INT_LEAST64_MAX__=9223372036854775807LL",
"__INT_LEAST64_TYPE__=long long int",
"__INT_LEAST64_WIDTH__=64",
"__INT_LEAST8_FMTd__=\"hhd\"",
"__INT_LEAST8_FMTi__=\"hhi\"",
"__INT_LEAST8_MAX__=127",
"__INT_LEAST8_TYPE__=signed char",
"__INT_LEAST8_WIDTH__=8",
"__INT_MAX__=2147483647",
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"__UINT16_C_SUFFIX__=",
"__UINT16_FMTX__=\"hX\"",
"__UINT16_FMTo__=\"ho\"",
"__UINT16_FMTu__=\"hu\"",
"__UINT16_FMTx__=\"hx\"",
"__UINT16_MAX__=65535",
"__UINT16_TYPE__=unsigned short",
"__UINT32_C_SUFFIX__=U",
"__UINT32_FMTX__=\"X\"",
"__UINT32_FMTo__=\"o\"",
"__UINT32_FMTu__=\"u\"",
"__UINT32_FMTx__=\"x\"",
"__UINT32_MAX__=4294967295U",
"__UINT32_TYPE__=unsigned int",
"__UINT64_C_SUFFIX__=ULL",
"__UINT64_FMTX__=\"llX\"",
"__UINT64_FMTo__=\"llo\"",
"__UINT64_FMTu__=\"llu\"",
"__UINT64_FMTx__=\"llx\"",
"__UINT64_MAX__=18446744073709551615ULL",
"__UINT64_TYPE__=long long unsigned int",
"__UINT8_C_SUFFIX__=",
"__UINT8_FMTX__=\"hhX\"",
"__UINT8_FMTo__=\"hho\"",
"__UINT8_FMTu__=\"hhu\"",
"__UINT8_FMTx__=\"hhx\"",
"__UINT8_MAX__=255",
"__UINT8_TYPE__=unsigned char",
"__UINTMAX_C_SUFFIX__=ULL",
"__UINTMAX_FMTX__=\"llX\"",
"__UINTMAX_FMTo__=\"llo\"",
"__UINTMAX_FMTu__=\"llu\"",
"__UINTMAX_FMTx__=\"llx\"",
"__UINTMAX_MAX__=18446744073709551615ULL",
"__UINTMAX_TYPE__=long long unsigned int",
"__UINTMAX_WIDTH__=64",
"__UINTPTR_FMTX__=\"X\"",
"__UINTPTR_FMTo__=\"o\"",
"__UINTPTR_FMTu__=\"u\"",
"__UINTPTR_FMTx__=\"x\"",
"__UINTPTR_MAX__=4294967295U",
"__UINTPTR_TYPE__=unsigned int",
"__UINTPTR_WIDTH__=32",
"__UINT_FAST16_FMTX__=\"hX\"",
"__UINT_FAST16_FMTo__=\"ho\"",
"__UINT_FAST16_FMTu__=\"hu\"",
"__UINT_FAST16_FMTx__=\"hx\"",
"__UINT_FAST16_MAX__=65535",
"__UINT_FAST16_TYPE__=unsigned short",
"__UINT_FAST32_FMTX__=\"X\"",
"__UINT_FAST32_FMTo__=\"o\"",
"__UINT_FAST32_FMTu__=\"u\"",
"__UINT_FAST32_FMTx__=\"x\"",
"__UINT_FAST32_MAX__=4294967295U",
"__UINT_FAST32_TYPE__=unsigned int",
"__UINT_FAST64_FMTX__=\"llX\"",
"__UINT_FAST64_FMTo__=\"llo\"",
"__UINT_FAST64_FMTu__=\"llu\"",
"__UINT_FAST64_FMTx__=\"llx\"",
"__UINT_FAST64_MAX__=18446744073709551615ULL",
"__UINT_FAST64_TYPE__=long long unsigned int",
"__UINT_FAST8_FMTX__=\"hhX\"",
"__UINT_FAST8_FMTo__=\"hho\"",
"__UINT_FAST8_FMTu__=\"hhu\"",
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"__UINT_FAST8_TYPE__=unsigned char",
"__UINT_LEAST16_FMTX__=\"hX\"",
"__UINT_LEAST16_FMTo__=\"ho\"",
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"__UINT_LEAST16_MAX__=65535",
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"__UINT_LEAST32_FMTX__=\"X\"",
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"__UINT_LEAST32_MAX__=4294967295U",
"__UINT_LEAST32_TYPE__=unsigned int",
"__UINT_LEAST64_FMTX__=\"llX\"",
"__UINT_LEAST64_FMTo__=\"llo\"",
"__UINT_LEAST64_FMTu__=\"llu\"",
"__UINT_LEAST64_FMTx__=\"llx\"",
"__UINT_LEAST64_MAX__=18446744073709551615ULL",
"__UINT_LEAST64_TYPE__=long long unsigned int",
"__UINT_LEAST8_FMTX__=\"hhX\"",
"__UINT_LEAST8_FMTo__=\"hho\"",
"__UINT_LEAST8_FMTu__=\"hhu\"",
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"__clang_wide_literal_encoding__=\"UTF-32\"",
"__llvm__=1"
],
"intelliSenseMode": "${default}"
}
],
"version": 4
}

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<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>18</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>1</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>6</nTsel>
<sDll />
<sDllPa />
<sDlgDll />
<sDlgPa />
<sIfile />
<tDll />
<tDllPa />
<tDlgDll />
<tDlgPa />
<tIfile />
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U-O142 -O2254 -S0 -C0 -A1 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32H5xx_2M_0800.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32H563ZI$Flash\STM32H5xx_2M_0800.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key />
<Name />
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint />
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>1</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable />
<LintConfigFile />
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName />
<pszMrule />
<pSingCmds />
<pMultCmds />
<pMisraNamep />
<pszMrulep />
<pSingCmdsp />
<pMultCmdsp />
</TargetOption>
</Target>
</ProjectOpt>

1384
MDK-ARM/AutoGuideStick.uvprojx Normal file
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573
MDK-ARM/startup_stm32h563xx.s Normal file
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@@ -0,0 +1,573 @@
;*******************************************************************************
;* File Name : startup_stm32h563xx.s
;* Author : MCD Application Team
;* Description : STM32H563xx Non Crypto devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the Cortex-M33 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;*******************************************************************************
;* @attention
;*
;* Copyright (c) 2023 STMicroelectronics.
;* All rights reserved.
;*
;* This software is licensed under terms that can be found in the LICENSE file
;* in the root directory of this software component.
;* If no LICENSE file comes with this software, it is provided AS-IS.
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
;
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD SecureFault_Handler ; Secure Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window WatchDog
DCD PVD_AVD_IRQHandler ; PVD/AVD through EXTI Line detection Interrupt
DCD RTC_IRQHandler ; RTC non-secure interrupt
DCD RTC_S_IRQHandler ; RTC secure interrupt
DCD TAMP_IRQHandler ; Tamper non-secure interrupt
DCD RAMCFG_IRQHandler ; RAMCFG global
DCD FLASH_IRQHandler ; FLASH non-secure global interrupt
DCD FLASH_S_IRQHandler ; FLASH secure global interrupt
DCD GTZC_IRQHandler ; Global TrustZone Controller interrupt
DCD RCC_IRQHandler ; RCC non-secure global interrupt
DCD RCC_S_IRQHandler ; RCC secure global interrupt
DCD EXTI0_IRQHandler ; EXTI Line0 interrupt
DCD EXTI1_IRQHandler ; EXTI Line1 interrupt
DCD EXTI2_IRQHandler ; EXTI Line2 interrupt
DCD EXTI3_IRQHandler ; EXTI Line3 interrupt
DCD EXTI4_IRQHandler ; EXTI Line4 interrupt
DCD EXTI5_IRQHandler ; EXTI Line5 interrupt
DCD EXTI6_IRQHandler ; EXTI Line6 interrupt
DCD EXTI7_IRQHandler ; EXTI Line7 interrupt
DCD EXTI8_IRQHandler ; EXTI Line8 interrupt
DCD EXTI9_IRQHandler ; EXTI Line9 interrupt
DCD EXTI10_IRQHandler ; EXTI Line10 interrupt
DCD EXTI11_IRQHandler ; EXTI Line11 interrupt
DCD EXTI12_IRQHandler ; EXTI Line12 interrupt
DCD EXTI13_IRQHandler ; EXTI Line13 interrupt
DCD EXTI14_IRQHandler ; EXTI Line14 interrupt
DCD EXTI15_IRQHandler ; EXTI Line15 interrupt
DCD GPDMA1_Channel0_IRQHandler ; GPDMA1 Channel 0 global interrupt
DCD GPDMA1_Channel1_IRQHandler ; GPDMA1 Channel 1 global interrupt
DCD GPDMA1_Channel2_IRQHandler ; GPDMA1 Channel 2 global interrupt
DCD GPDMA1_Channel3_IRQHandler ; GPDMA1 Channel 3 global interrupt
DCD GPDMA1_Channel4_IRQHandler ; GPDMA1 Channel 4 global interrupt
DCD GPDMA1_Channel5_IRQHandler ; GPDMA1 Channel 5 global interrupt
DCD GPDMA1_Channel6_IRQHandler ; GPDMA1 Channel 6 global interrupt
DCD GPDMA1_Channel7_IRQHandler ; GPDMA1 Channel 7 global interrupt
DCD IWDG_IRQHandler ; IWDG global interrupt
DCD 0 ; Reserved
DCD ADC1_IRQHandler ; ADC1 global interrupt
DCD DAC1_IRQHandler ; DAC1 global interrupt
DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt 0
DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt 1
DCD TIM1_BRK_IRQHandler ; TIM1 Break interrupt
DCD TIM1_UP_IRQHandler ; TIM1 Update interrupt
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation interrupt
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare interrupt
DCD TIM2_IRQHandler ; TIM2 global interrupt
DCD TIM3_IRQHandler ; TIM3 global interrupt
DCD TIM4_IRQHandler ; TIM4 global interrupt
DCD TIM5_IRQHandler ; TIM5 global interrupt
DCD TIM6_IRQHandler ; TIM6 global interrupt
DCD TIM7_IRQHandler ; TIM7 global interrupt
DCD I2C1_EV_IRQHandler ; I2C1 Event interrupt
DCD I2C1_ER_IRQHandler ; I2C1 Error interrupt
DCD I2C2_EV_IRQHandler ; I2C2 Event interrupt
DCD I2C2_ER_IRQHandler ; I2C2 Error interrupt
DCD SPI1_IRQHandler ; SPI1 global interrupt
DCD SPI2_IRQHandler ; SPI2 global interrupt
DCD SPI3_IRQHandler ; SPI3 global interrupt
DCD USART1_IRQHandler ; USART1 global interrupt
DCD USART2_IRQHandler ; USART2 global interrupt
DCD USART3_IRQHandler ; USART3 global interrupt
DCD UART4_IRQHandler ; UART4 global interrupt
DCD UART5_IRQHandler ; UART5 global interrupt
DCD LPUART1_IRQHandler ; LPUART1 global interrupt
DCD LPTIM1_IRQHandler ; LPTIM1 global interrupt
DCD TIM8_BRK_IRQHandler ; TIM8 Break interrupt
DCD TIM8_UP_IRQHandler ; TIM8 Update interrupt
DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation interrupt
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare interrupt
DCD ADC2_IRQHandler ; ADC2 global interrupt
DCD LPTIM2_IRQHandler ; LPTIM2 global interrupt
DCD TIM15_IRQHandler ; TIM15 global interrupt
DCD TIM16_IRQHandler ; TIM16 global interrupt
DCD TIM17_IRQHandler ; TIM17 global interrupt
DCD USB_DRD_FS_IRQHandler ; USB DRD FS global interrupt
DCD CRS_IRQHandler ; CRS global interrupt
DCD UCPD1_IRQHandler ; UCPD1 global interrupt
DCD FMC_IRQHandler ; FMC global interrupt
DCD OCTOSPI1_IRQHandler ; OctoSPI1 global interrupt
DCD SDMMC1_IRQHandler ; SDMMC1 global interrupt
DCD I2C3_EV_IRQHandler ; I2C2 Event interrupt
DCD I2C3_ER_IRQHandler ; I2C2 Error interrupt
DCD SPI4_IRQHandler ; SPI4 global interrupt
DCD SPI5_IRQHandler ; SPI5 global interrupt
DCD SPI6_IRQHandler ; SPI6 global interrupt
DCD USART6_IRQHandler ; USART6 global interrupt
DCD USART10_IRQHandler ; USART10 global interrupt
DCD USART11_IRQHandler ; USART11 global interrupt
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
DCD SAI2_IRQHandler ; Serial Audio Interface 2 global interrupt
DCD GPDMA2_Channel0_IRQHandler ; GPDMA2 Channel 0 global interrupt
DCD GPDMA2_Channel1_IRQHandler ; GPDMA2 Channel 1 global interrupt
DCD GPDMA2_Channel2_IRQHandler ; GPDMA2 Channel 2 global interrupt
DCD GPDMA2_Channel3_IRQHandler ; GPDMA2 Channel 3 global interrupt
DCD GPDMA2_Channel4_IRQHandler ; GPDMA2 Channel 4 global interrupt
DCD GPDMA2_Channel5_IRQHandler ; GPDMA2 Channel 5 global interrupt
DCD GPDMA2_Channel6_IRQHandler ; GPDMA2 Channel 6 global interrupt
DCD GPDMA2_Channel7_IRQHandler ; GPDMA2 Channel 7 global interrupt
DCD UART7_IRQHandler ; UART7 global interrupt
DCD UART8_IRQHandler ; UART8 global interrupt
DCD UART9_IRQHandler ; UART9 global interrupt
DCD UART12_IRQHandler ; UART12 global interrupt
DCD SDMMC2_IRQHandler ; SDMMC2 global interrupt
DCD FPU_IRQHandler ; FPU global interrupt
DCD ICACHE_IRQHandler ; Instruction cache global interrupt
DCD DCACHE1_IRQHandler ; DCACHE1 global interrupt
DCD ETH_IRQHandler ; Ethernet global interrupt
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup global interrupt
DCD DCMI_PSSI_IRQHandler ; DCMI PSSI global interrupt
DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt 0
DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt 1
DCD CORDIC_IRQHandler ; CORDIC global interrupt
DCD FMAC_IRQHandler ; FMAC global interrupt
DCD DTS_IRQHandler ; DTS global interrupt
DCD RNG_IRQHandler ; RNG global interrupt
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD HASH_IRQHandler ; HASH global interrupt
DCD 0 ; Reserved
DCD CEC_IRQHandler ; CEC global interrupt
DCD TIM12_IRQHandler ; TIM12 global interrupt
DCD TIM13_IRQHandler ; TIM13 global interrupt
DCD TIM14_IRQHandler ; TIM14 global interrupt
DCD I3C1_EV_IRQHandler ; I3C1 Event interrupt
DCD I3C1_ER_IRQHandler ; I3C1 Error interrupt
DCD I2C4_EV_IRQHandler ; I2C4 Event interrupt
DCD I2C4_ER_IRQHandler ; I2C4 Error interrupt
DCD LPTIM3_IRQHandler ; LPTIM3 global interrupt
DCD LPTIM4_IRQHandler ; LPTIM4 global interrupt
DCD LPTIM5_IRQHandler ; LPTIM5 global interrupt
DCD LPTIM6_IRQHandler ; LPTIM6 global interrupt
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler\
PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SecureFault_Handler\
PROC
EXPORT SecureFault_Handler [WEAK]
B .
ENDP
SVC_Handler\
PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler\
PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler\
PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_AVD_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT RTC_S_IRQHandler [WEAK]
EXPORT TAMP_IRQHandler [WEAK]
EXPORT RAMCFG_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT FLASH_S_IRQHandler [WEAK]
EXPORT GTZC_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT RCC_S_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT EXTI5_IRQHandler [WEAK]
EXPORT EXTI6_IRQHandler [WEAK]
EXPORT EXTI7_IRQHandler [WEAK]
EXPORT EXTI8_IRQHandler [WEAK]
EXPORT EXTI9_IRQHandler [WEAK]
EXPORT EXTI10_IRQHandler [WEAK]
EXPORT EXTI11_IRQHandler [WEAK]
EXPORT EXTI12_IRQHandler [WEAK]
EXPORT EXTI13_IRQHandler [WEAK]
EXPORT EXTI14_IRQHandler [WEAK]
EXPORT EXTI15_IRQHandler [WEAK]
EXPORT GPDMA1_Channel0_IRQHandler [WEAK]
EXPORT GPDMA1_Channel1_IRQHandler [WEAK]
EXPORT GPDMA1_Channel2_IRQHandler [WEAK]
EXPORT GPDMA1_Channel3_IRQHandler [WEAK]
EXPORT GPDMA1_Channel4_IRQHandler [WEAK]
EXPORT GPDMA1_Channel5_IRQHandler [WEAK]
EXPORT GPDMA1_Channel6_IRQHandler [WEAK]
EXPORT GPDMA1_Channel7_IRQHandler [WEAK]
EXPORT IWDG_IRQHandler [WEAK]
EXPORT ADC1_IRQHandler [WEAK]
EXPORT DAC1_IRQHandler [WEAK]
EXPORT FDCAN1_IT0_IRQHandler [WEAK]
EXPORT FDCAN1_IT1_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT TIM5_IRQHandler [WEAK]
EXPORT TIM6_IRQHandler [WEAK]
EXPORT TIM7_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT LPUART1_IRQHandler [WEAK]
EXPORT LPTIM1_IRQHandler [WEAK]
EXPORT TIM8_BRK_IRQHandler [WEAK]
EXPORT TIM8_UP_IRQHandler [WEAK]
EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
EXPORT TIM8_CC_IRQHandler [WEAK]
EXPORT ADC2_IRQHandler [WEAK]
EXPORT LPTIM2_IRQHandler [WEAK]
EXPORT TIM15_IRQHandler [WEAK]
EXPORT TIM16_IRQHandler [WEAK]
EXPORT TIM17_IRQHandler [WEAK]
EXPORT USB_DRD_FS_IRQHandler [WEAK]
EXPORT CRS_IRQHandler [WEAK]
EXPORT UCPD1_IRQHandler [WEAK]
EXPORT FMC_IRQHandler [WEAK]
EXPORT OCTOSPI1_IRQHandler [WEAK]
EXPORT SDMMC1_IRQHandler [WEAK]
EXPORT I2C3_EV_IRQHandler [WEAK]
EXPORT I2C3_ER_IRQHandler [WEAK]
EXPORT SPI4_IRQHandler [WEAK]
EXPORT SPI5_IRQHandler [WEAK]
EXPORT SPI6_IRQHandler [WEAK]
EXPORT USART6_IRQHandler [WEAK]
EXPORT USART10_IRQHandler [WEAK]
EXPORT USART11_IRQHandler [WEAK]
EXPORT SAI1_IRQHandler [WEAK]
EXPORT SAI2_IRQHandler [WEAK]
EXPORT GPDMA2_Channel0_IRQHandler [WEAK]
EXPORT GPDMA2_Channel1_IRQHandler [WEAK]
EXPORT GPDMA2_Channel2_IRQHandler [WEAK]
EXPORT GPDMA2_Channel3_IRQHandler [WEAK]
EXPORT GPDMA2_Channel4_IRQHandler [WEAK]
EXPORT GPDMA2_Channel5_IRQHandler [WEAK]
EXPORT GPDMA2_Channel6_IRQHandler [WEAK]
EXPORT GPDMA2_Channel7_IRQHandler [WEAK]
EXPORT UART7_IRQHandler [WEAK]
EXPORT UART8_IRQHandler [WEAK]
EXPORT UART9_IRQHandler [WEAK]
EXPORT UART12_IRQHandler [WEAK]
EXPORT SDMMC2_IRQHandler [WEAK]
EXPORT FPU_IRQHandler [WEAK]
EXPORT ICACHE_IRQHandler [WEAK]
EXPORT DCACHE1_IRQHandler [WEAK]
EXPORT ETH_IRQHandler [WEAK]
EXPORT ETH_WKUP_IRQHandler [WEAK]
EXPORT DCMI_PSSI_IRQHandler [WEAK]
EXPORT FDCAN2_IT0_IRQHandler [WEAK]
EXPORT FDCAN2_IT1_IRQHandler [WEAK]
EXPORT CORDIC_IRQHandler [WEAK]
EXPORT FMAC_IRQHandler [WEAK]
EXPORT DTS_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT HASH_IRQHandler [WEAK]
EXPORT CEC_IRQHandler [WEAK]
EXPORT TIM12_IRQHandler [WEAK]
EXPORT TIM13_IRQHandler [WEAK]
EXPORT TIM14_IRQHandler [WEAK]
EXPORT I3C1_EV_IRQHandler [WEAK]
EXPORT I3C1_ER_IRQHandler [WEAK]
EXPORT I2C4_EV_IRQHandler [WEAK]
EXPORT I2C4_ER_IRQHandler [WEAK]
EXPORT LPTIM3_IRQHandler [WEAK]
EXPORT LPTIM4_IRQHandler [WEAK]
EXPORT LPTIM5_IRQHandler [WEAK]
EXPORT LPTIM6_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_AVD_IRQHandler
RTC_IRQHandler
RTC_S_IRQHandler
TAMP_IRQHandler
RAMCFG_IRQHandler
FLASH_IRQHandler
FLASH_S_IRQHandler
GTZC_IRQHandler
RCC_IRQHandler
RCC_S_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
EXTI5_IRQHandler
EXTI6_IRQHandler
EXTI7_IRQHandler
EXTI8_IRQHandler
EXTI9_IRQHandler
EXTI10_IRQHandler
EXTI11_IRQHandler
EXTI12_IRQHandler
EXTI13_IRQHandler
EXTI14_IRQHandler
EXTI15_IRQHandler
GPDMA1_Channel0_IRQHandler
GPDMA1_Channel1_IRQHandler
GPDMA1_Channel2_IRQHandler
GPDMA1_Channel3_IRQHandler
GPDMA1_Channel4_IRQHandler
GPDMA1_Channel5_IRQHandler
GPDMA1_Channel6_IRQHandler
GPDMA1_Channel7_IRQHandler
IWDG_IRQHandler
ADC1_IRQHandler
DAC1_IRQHandler
FDCAN1_IT0_IRQHandler
FDCAN1_IT1_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
TIM5_IRQHandler
TIM6_IRQHandler
TIM7_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
SPI3_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
LPUART1_IRQHandler
LPTIM1_IRQHandler
TIM8_BRK_IRQHandler
TIM8_UP_IRQHandler
TIM8_TRG_COM_IRQHandler
TIM8_CC_IRQHandler
ADC2_IRQHandler
LPTIM2_IRQHandler
TIM15_IRQHandler
TIM16_IRQHandler
TIM17_IRQHandler
USB_DRD_FS_IRQHandler
CRS_IRQHandler
UCPD1_IRQHandler
FMC_IRQHandler
OCTOSPI1_IRQHandler
SDMMC1_IRQHandler
I2C3_EV_IRQHandler
I2C3_ER_IRQHandler
SPI4_IRQHandler
SPI5_IRQHandler
SPI6_IRQHandler
USART6_IRQHandler
USART10_IRQHandler
USART11_IRQHandler
SAI1_IRQHandler
SAI2_IRQHandler
GPDMA2_Channel0_IRQHandler
GPDMA2_Channel1_IRQHandler
GPDMA2_Channel2_IRQHandler
GPDMA2_Channel3_IRQHandler
GPDMA2_Channel4_IRQHandler
GPDMA2_Channel5_IRQHandler
GPDMA2_Channel6_IRQHandler
GPDMA2_Channel7_IRQHandler
UART7_IRQHandler
UART8_IRQHandler
UART9_IRQHandler
UART12_IRQHandler
SDMMC2_IRQHandler
FPU_IRQHandler
ICACHE_IRQHandler
DCACHE1_IRQHandler
ETH_IRQHandler
ETH_WKUP_IRQHandler
DCMI_PSSI_IRQHandler
FDCAN2_IT0_IRQHandler
FDCAN2_IT1_IRQHandler
CORDIC_IRQHandler
FMAC_IRQHandler
DTS_IRQHandler
RNG_IRQHandler
HASH_IRQHandler
CEC_IRQHandler
TIM12_IRQHandler
TIM13_IRQHandler
TIM14_IRQHandler
I3C1_EV_IRQHandler
I3C1_ER_IRQHandler
I2C4_EV_IRQHandler
I2C4_ER_IRQHandler
LPTIM3_IRQHandler
LPTIM4_IRQHandler
LPTIM5_IRQHandler
LPTIM6_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END