generated from Template/H563ZI-HAL-CMake-Template
320 lines
8.0 KiB
C
320 lines
8.0 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32h5xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32h5xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "headfile.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern TIM_HandleTypeDef htim2;
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extern TIM_HandleTypeDef htim3;
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extern DMA_NodeTypeDef Node_GPDMA1_Channel5;
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extern DMA_QListTypeDef List_GPDMA1_Channel5;
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extern DMA_HandleTypeDef handle_GPDMA1_Channel5;
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extern DMA_HandleTypeDef handle_GPDMA1_Channel4;
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extern DMA_NodeTypeDef Node_GPDMA1_Channel3;
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extern DMA_QListTypeDef List_GPDMA1_Channel3;
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extern DMA_HandleTypeDef handle_GPDMA1_Channel3;
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extern UART_HandleTypeDef huart4;
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extern UART_HandleTypeDef huart2;
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extern UART_HandleTypeDef huart3;
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extern TIM_HandleTypeDef htim5;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Pre-fetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32H5xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32h5xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles GPDMA1 Channel 3 global interrupt.
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*/
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void GPDMA1_Channel3_IRQHandler(void)
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{
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/* USER CODE BEGIN GPDMA1_Channel3_IRQn 0 */
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/* USER CODE END GPDMA1_Channel3_IRQn 0 */
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HAL_DMA_IRQHandler(&handle_GPDMA1_Channel3);
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/* USER CODE BEGIN GPDMA1_Channel3_IRQn 1 */
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/* USER CODE END GPDMA1_Channel3_IRQn 1 */
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}
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/**
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* @brief This function handles GPDMA1 Channel 4 global interrupt.
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*/
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void GPDMA1_Channel4_IRQHandler(void)
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{
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/* USER CODE BEGIN GPDMA1_Channel4_IRQn 0 */
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/* USER CODE END GPDMA1_Channel4_IRQn 0 */
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HAL_DMA_IRQHandler(&handle_GPDMA1_Channel4);
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/* USER CODE BEGIN GPDMA1_Channel4_IRQn 1 */
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/* USER CODE END GPDMA1_Channel4_IRQn 1 */
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}
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/**
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* @brief This function handles GPDMA1 Channel 5 global interrupt.
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*/
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void GPDMA1_Channel5_IRQHandler(void)
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{
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/* USER CODE BEGIN GPDMA1_Channel5_IRQn 0 */
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/* USER CODE END GPDMA1_Channel5_IRQn 0 */
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HAL_DMA_IRQHandler(&handle_GPDMA1_Channel5);
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/* USER CODE BEGIN GPDMA1_Channel5_IRQn 1 */
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/* USER CODE END GPDMA1_Channel5_IRQn 1 */
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}
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/**
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* @brief This function handles TIM2 global interrupt.
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*/
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void TIM2_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM2_IRQn 0 */
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/* USER CODE END TIM2_IRQn 0 */
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HAL_TIM_IRQHandler(&htim2);
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/* USER CODE BEGIN TIM2_IRQn 1 */
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/* USER CODE END TIM2_IRQn 1 */
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}
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/**
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* @brief This function handles TIM3 global interrupt.
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*/
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void TIM3_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM3_IRQn 0 */
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/* USER CODE END TIM3_IRQn 0 */
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HAL_TIM_IRQHandler(&htim3);
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/* USER CODE BEGIN TIM3_IRQn 1 */
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/* USER CODE END TIM3_IRQn 1 */
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}
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/**
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* @brief This function handles TIM5 global interrupt.
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*/
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void TIM5_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM5_IRQn 0 */
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/* USER CODE END TIM5_IRQn 0 */
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HAL_TIM_IRQHandler(&htim5);
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/* USER CODE BEGIN TIM5_IRQn 1 */
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/* USER CODE END TIM5_IRQn 1 */
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}
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/**
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* @brief This function handles USART2 global interrupt.
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*/
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void USART2_IRQHandler(void)
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{
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/* USER CODE BEGIN USART2_IRQn 0 */
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/* USER CODE END USART2_IRQn 0 */
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HAL_UART_IRQHandler(&huart2);
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/* USER CODE BEGIN USART2_IRQn 1 */
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/* USER CODE END USART2_IRQn 1 */
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}
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/**
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* @brief This function handles USART3 global interrupt.
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*/
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void USART3_IRQHandler(void)
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{
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/* USER CODE BEGIN USART3_IRQn 0 */
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/* USER CODE END USART3_IRQn 0 */
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HAL_UART_IRQHandler(&huart3);
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/* USER CODE BEGIN USART3_IRQn 1 */
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/* USER CODE END USART3_IRQn 1 */
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}
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/**
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* @brief This function handles UART4 global interrupt.
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*/
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void UART4_IRQHandler(void)
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{
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HAL_UART_IRQHandler(&huart4);
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if (__HAL_UART_GET_FLAG(&huart4, UART_FLAG_IDLE))
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{
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__HAL_UART_CLEAR_IDLEFLAG(&huart4); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
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// ֹͣDMA
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HAL_UART_DMAStop(&huart4);
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// <20><><EFBFBD><EFBFBD>ʵ<EFBFBD>ʽ<EFBFBD><CABD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
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uint16_t len = UART_DMA_RX_BUF_SIZE - __HAL_DMA_GET_COUNTER(huart4.hdmarx);
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ring buffer
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for (uint16_t i = 0; i < len; i++)
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{
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ble_rx_ring.buffer[ble_rx_ring.head] = uart_dma_rx_buf[i];
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ble_rx_ring.head = (ble_rx_ring.head + 1) % RING_BUFFER_SIZE;
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}
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flag = 1;
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA
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HAL_UART_Receive_DMA(&huart4, uart_dma_rx_buf, UART_DMA_RX_BUF_SIZE);
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}
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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