generated from Template/H563ZI-HAL-CMake-Template
	
		
			
				
	
	
		
			755 lines
		
	
	
		
			27 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			755 lines
		
	
	
		
			27 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /**
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|   ******************************************************************************
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|   * @file    stm32h5xx_hal_gpio.c
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|   * @author  MCD Application Team
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|   * @brief   GPIO HAL module driver.
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|   *          This file provides firmware functions to manage the following
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|   *          functionalities of the General Purpose Input/Output (GPIO) peripheral:
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|   *           + Initialization and de-initialization functions
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|   *           + IO operation functions
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|   ******************************************************************************
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|   * @attention
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|   *
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|   * Copyright (c) 2023 STMicroelectronics.
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|   * All rights reserved.
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|   *
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|   * This software is licensed under terms that can be found in the LICENSE file
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|   * in the root directory of this software component.
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|   * If no LICENSE file comes with this software, it is provided AS-IS.
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|   *
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|   ******************************************************************************
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|   @verbatim
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|   ==============================================================================
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|                     ##### GPIO Peripheral features #####
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|   ==============================================================================
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|   [..]
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|     (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually
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|         configured by software in several modes:
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|         (++) Input mode
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|         (++) Analog mode
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|         (++) Output mode
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|         (++) Alternate function mode
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|         (++) External interrupt/event lines
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| 
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|     (+) During and just after reset, the alternate functions and external interrupt
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|         lines are not active and the I/O ports are configured in input floating mode.
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| 
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|     (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be
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|         activated or not.
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| 
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|     (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull
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|         type and the IO speed can be selected depending on the VDD value.
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| 
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|     (+) The microcontroller IO pins are connected to onboard peripherals/modules through a
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|         multiplexer that allows only one peripheral alternate function (AF) connected
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|        to an IO pin at a time. In this way, there can be no conflict between peripherals
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|        sharing the same IO pin.
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| 
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|     (+) All ports have external interrupt/event capability. To use external interrupt
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|         lines, the port must be configured in input mode. All available GPIO pins are
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|         connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
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| 
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|     (+) The external interrupt/event controller consists of up to 39 edge detectors
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|         (16 lines are connected to GPIO) for generating event/interrupt requests (each
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|         input line can be independently configured to select the type (interrupt or event)
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|         and the corresponding trigger event (rising or falling or both). Each line can
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|         also be masked independently.
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| 
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|                      ##### How to use this driver #####
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|   ==============================================================================
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|   [..]
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|     (#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE().
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| 
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|     (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
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|         (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
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|         (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
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|              structure.
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|         (++) In case of Output or alternate function mode selection: the speed is
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|              configured through "Speed" member from GPIO_InitTypeDef structure.
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|         (++) In alternate mode is selection, the alternate function connected to the IO
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|              is configured through "Alternate" member from GPIO_InitTypeDef structure.
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|         (++) Analog mode is required when a pin is to be used as ADC channel
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|              or DAC output.
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|         (++) In case of external interrupt/event selection the "Mode" member from
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|              GPIO_InitTypeDef structure select the type (interrupt or event) and
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|              the corresponding trigger event (rising or falling or both).
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| 
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|     (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
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|         mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
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|         HAL_NVIC_EnableIRQ().
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| 
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|     (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
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| 
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|     (#) To set/reset the level of a pin configured in output mode use
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|         HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
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| 
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|     (#) To set the level of several pins and reset level of several other pins in
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|         same cycle, use HAL_GPIO_WriteMultipleStatePin().
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| 
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|    (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
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| 
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|     (#) During and just after reset, the alternate functions are not
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|         active and the GPIO pins are configured in input floating mode (except JTAG
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|         pins).
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| 
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|     (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
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|         (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
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|         priority over the GPIO function.
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| 
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|     (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
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|         general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
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|         The HSE has priority over the GPIO function.
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| 
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|   @endverbatim
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|   ******************************************************************************
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|   */
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| 
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| /* Includes ------------------------------------------------------------------*/
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| #include "stm32h5xx_hal.h"
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| 
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| /** @addtogroup STM32H5xx_HAL_Driver
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|   * @{
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|   */
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| 
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| /** @defgroup GPIO GPIO
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|   * @brief GPIO HAL module driver
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|   * @{
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|   */
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| 
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| #ifdef HAL_GPIO_MODULE_ENABLED
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| 
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| /* Private typedef -----------------------------------------------------------*/
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| /* Private defines -----------------------------------------------------------*/
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| /** @defgroup GPIO_Private_Defines GPIO Private Defines
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|   * @{
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|   */
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| #define GPIO_MODE             (0x00000003U)
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| #define EXTI_MODE             (0x10000000U)
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| #define GPIO_MODE_IT          (0x00010000U)
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| #define GPIO_MODE_EVT         (0x00020000U)
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| #define RISING_EDGE           (0x00100000U)
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| #define FALLING_EDGE          (0x00200000U)
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| #define GPIO_OUTPUT_TYPE      (0x00000010U)
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| #define GPIO_NUMBER           (16U)
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| 
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| /**
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|   * @}
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|   */
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| 
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| /* Private macros ------------------------------------------------------------*/
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| /* Private variables ---------------------------------------------------------*/
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| /** @defgroup GPIO_Private_Macros GPIO Private Macros
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|   * @{
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|   */
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| /**
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|   * @}
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|   */
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| 
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| /* Private function prototypes -----------------------------------------------*/
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| /* Exported functions --------------------------------------------------------*/
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| 
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| /** @defgroup GPIO_Exported_Functions GPIO Exported Functions
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|   * @{
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|   */
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| 
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| /** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions
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|   *  @brief    Initialization and Configuration functions
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|   *
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| @verbatim
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|  ===============================================================================
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|               ##### Initialization and de-initialization functions #####
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|  ===============================================================================
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| 
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| @endverbatim
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|   * @{
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|   */
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| 
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| /**
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|   * @brief  Initialize the GPIOx peripheral according to the specified parameters in the pGPIO_Init.
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|   * @note   If GPIOx peripheral pin is used in EXTI_MODE and the pin is secure in case
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|   *         the system implements the security (TZEN=1), it is up to the secure application to
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|   *         insure that the corresponding EXTI line is set secure.
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|   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
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|   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
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|   * @param  pGPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
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|   *         the configuration information for the specified GPIO peripheral.
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|   * @retval None
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|   */
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| void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, const GPIO_InitTypeDef *pGPIO_Init)
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| {
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|   uint32_t tmp;
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|   uint32_t iocurrent;
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|   uint32_t position = 0U;
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| 
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| 
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|   /* Check the parameters */
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|   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
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|   assert_param(IS_GPIO_PIN(pGPIO_Init->Pin));
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|   assert_param(IS_GPIO_MODE(pGPIO_Init->Mode));
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|   assert_param(IS_GPIO_PULL(pGPIO_Init->Pull));
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| 
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|   /* Configure the port pins */
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|   while (((pGPIO_Init->Pin) >> position) != 0U)
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|   {
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|     /* Get current io position */
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|     iocurrent = (pGPIO_Init->Pin) & (1UL << position);
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| 
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|     if (iocurrent != 0U)
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|     {
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|       /*--------------------- GPIO Mode Configuration ------------------------*/
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|       /* In case of Alternate function mode selection */
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|       if ((pGPIO_Init->Mode == GPIO_MODE_AF_PP) || (pGPIO_Init->Mode == GPIO_MODE_AF_OD))
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|       {
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|         /* Check the Alternate function parameters */
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|         assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
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|         assert_param(IS_GPIO_AF(pGPIO_Init->Alternate));
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| 
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|         /* Configure Alternate function mapped with the current IO */
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|         tmp = GPIOx->AFR[position >> 3U];
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|         tmp &= ~(0x0FUL << ((position & 0x07U) * GPIO_AFRL_AFSEL1_Pos));
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|         tmp |= ((pGPIO_Init->Alternate & 0x0FUL) << ((position & 0x07U) * GPIO_AFRL_AFSEL1_Pos));
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|         GPIOx->AFR[position >> 3U] = tmp;
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|       }
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| 
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|       /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
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|       tmp = GPIOx->MODER;
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|       tmp &= ~(GPIO_MODER_MODE0 << (position * GPIO_MODER_MODE1_Pos));
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|       tmp |= ((pGPIO_Init->Mode & GPIO_MODE) << (position * GPIO_MODER_MODE1_Pos));
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|       GPIOx->MODER = tmp;
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| 
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|       /* In case of Output or Alternate function mode selection */
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|       if ((pGPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (pGPIO_Init->Mode == GPIO_MODE_AF_PP) ||
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|           (pGPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (pGPIO_Init->Mode == GPIO_MODE_AF_OD))
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|       {
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|         /* Check the Speed parameter */
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|         assert_param(IS_GPIO_SPEED(pGPIO_Init->Speed));
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| 
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|         /* Configure the IO Speed */
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|         tmp = GPIOx->OSPEEDR;
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|         tmp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * GPIO_OSPEEDR_OSPEED1_Pos));
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|         tmp |= (pGPIO_Init->Speed << (position * GPIO_OSPEEDR_OSPEED1_Pos));
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|         GPIOx->OSPEEDR = tmp;
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| 
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|         /* Configure the IO Output Type */
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|         tmp = GPIOx->OTYPER;
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|         tmp &= ~(GPIO_OTYPER_OT0 << position) ;
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|         tmp |= (((pGPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
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|         GPIOx->OTYPER = tmp;
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|       }
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| 
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|       if (((pGPIO_Init->Mode & GPIO_MODE) != GPIO_MODE_ANALOG) ||
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|           (((pGPIO_Init->Mode & GPIO_MODE) == GPIO_MODE_ANALOG) && (pGPIO_Init->Pull != GPIO_PULLUP)))
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|       {
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|         /* Check the Pull parameters */
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|         assert_param(IS_GPIO_PULL(pGPIO_Init->Pull));
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| 
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|         /* Activate the Pull-up or Pull down resistor for the current IO */
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|         tmp = GPIOx->PUPDR;
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|         tmp &= ~(GPIO_PUPDR_PUPD0 << (position * GPIO_PUPDR_PUPD1_Pos));
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|         tmp |= ((pGPIO_Init->Pull) << (position * GPIO_PUPDR_PUPD1_Pos));
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|         GPIOx->PUPDR = tmp;
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|       }
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| 
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|       /*--------------------- EXTI Mode Configuration ------------------------*/
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|       /* Configure the External Interrupt or event for the current IO */
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|       if ((pGPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
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|       {
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|         tmp = EXTI->EXTICR[position >> 2U];
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|         tmp &= ~((0x0FUL) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos));
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|         tmp |= (GPIO_GET_INDEX(GPIOx) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos));
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|         EXTI->EXTICR[position >> 2U] = tmp;
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| 
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|         /* Clear Rising Falling edge configuration */
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|         tmp = EXTI->RTSR1;
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|         tmp &= ~((uint32_t)iocurrent);
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|         if ((pGPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
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|         {
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|           tmp |= iocurrent;
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|         }
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|         EXTI->RTSR1 = tmp;
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| 
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|         tmp = EXTI->FTSR1;
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|         tmp &= ~((uint32_t)iocurrent);
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|         if ((pGPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
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|         {
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|           tmp |= iocurrent;
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|         }
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|         EXTI->FTSR1 = tmp;
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| 
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|         /* Clear EXTI line configuration */
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|         tmp = EXTI->EMR1;
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|         tmp &= ~((uint32_t)iocurrent);
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|         if ((pGPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
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|         {
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|           tmp |= iocurrent;
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|         }
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|         EXTI->EMR1 = tmp;
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| 
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|         tmp = EXTI->IMR1;
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|         tmp &= ~((uint32_t)iocurrent);
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|         if ((pGPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
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|         {
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|           tmp |= iocurrent;
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|         }
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|         EXTI->IMR1 = tmp;
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|       }
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|     }
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| 
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|     position++;
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|   }
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| }
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| 
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| /**
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|   * @brief  De-initialize the GPIOx peripheral registers to their default reset values.
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|   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
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|   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
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|   * @param  GPIO_Pin: specifies the port bit to be written.
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|   *         This parameter can be one of GPIO_PIN_x where x can be (0..15).
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|   * @retval None
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|   */
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| void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
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| {
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|   uint32_t tmp;
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|   uint32_t iocurrent;
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|   uint32_t position = 0U;
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| 
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|   /* Check the parameters */
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|   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
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|   assert_param(IS_GPIO_PIN(GPIO_Pin));
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| 
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|   /* Configure the port pins */
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|   while ((GPIO_Pin >> position) != 0U)
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|   {
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|     /* Get current io position */
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|     iocurrent = (GPIO_Pin) & (1UL << position);
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| 
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|     if (iocurrent != 0U)
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|     {
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|       /*------------------------- EXTI Mode Configuration --------------------*/
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|       /* Clear the External Interrupt or Event for the current IO */
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|       tmp = EXTI->EXTICR[position >> 2U];
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|       tmp &= ((0x0FUL) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos));
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|       if (tmp == (GPIO_GET_INDEX(GPIOx) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos)))
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|       {
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|         /* Clear EXTI line configuration */
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|         EXTI->IMR1 &= ~(iocurrent);
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|         EXTI->EMR1 &= ~(iocurrent);
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| 
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|         /* Clear Rising Falling edge configuration */
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|         EXTI->RTSR1 &= ~(iocurrent);
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|         EXTI->FTSR1 &= ~(iocurrent);
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| 
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|         tmp = (0x0FUL) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos);
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|         EXTI->EXTICR[position >> 2U] &= ~tmp;
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|       }
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| 
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|       /*------------------------- GPIO Mode Configuration --------------------*/
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|       /* Configure IO in Analog Mode */
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|       GPIOx->MODER |= (GPIO_MODER_MODE0 << (position * GPIO_MODER_MODE1_Pos));
 | |
| 
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|       /* Configure the default Alternate Function in current IO */
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|       GPIOx->AFR[position >> 3U] &= ~(0x0FUL << ((position & 0x07U) * GPIO_AFRL_AFSEL1_Pos));
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| 
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|       /* Configure the default value for IO Speed */
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|       GPIOx->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEED0 << (position * GPIO_OSPEEDR_OSPEED1_Pos));
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| 
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|       /* Configure the default value IO Output Type */
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|       GPIOx->OTYPER  &= ~(GPIO_OTYPER_OT0 << position);
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| 
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|       /* Deactivate the Pull-up and Pull-down resistor for the current IO */
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|       GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * GPIO_PUPDR_PUPD1_Pos));
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|     }
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| 
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|     position++;
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|   }
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| }
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| 
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| /**
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|   * @}
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|   */
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| 
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| /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
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|   *  @brief GPIO Read, Write, Toggle, Lock and EXTI management functions.
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|   *
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| @verbatim
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|  ===============================================================================
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|                        ##### IO operation functions #####
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|  ===============================================================================
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| 
 | |
| @endverbatim
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|   * @{
 | |
|   */
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| 
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| /**
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|   * @brief  Read the specified input port pin.
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|   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
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|   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
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|   * @param  GPIO_Pin: specifies the port bit to read.
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|   *         This parameter can be GPIO_PIN_x where x can be (0..15).
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|   * @retval The input port pin value.
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|   */
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| GPIO_PinState HAL_GPIO_ReadPin(const GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
 | |
| {
 | |
|   GPIO_PinState bitstatus;
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| 
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|   /* Check the parameters */
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|   assert_param(IS_GPIO_PIN(GPIO_Pin));
 | |
| 
 | |
|   if ((GPIOx->IDR & GPIO_Pin) != 0U)
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|   {
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|     bitstatus = GPIO_PIN_SET;
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|   }
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|   else
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|   {
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|     bitstatus = GPIO_PIN_RESET;
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|   }
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|   return bitstatus;
 | |
| }
 | |
| 
 | |
| /**
 | |
|   * @brief  Set or clear the selected data port bit.
 | |
|   *
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|   * @note   This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify
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|   *         accesses. In this way, there is no risk of an IRQ occurring between
 | |
|   *         the read and the modify access.
 | |
|   *
 | |
|   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
 | |
|   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
 | |
|   * @param  GPIO_Pin: specifies the port bit to be written.
 | |
|   *         This parameter can be one of GPIO_PIN_x where x can be (0..15).
 | |
|   * @param  PinState: specifies the value to be written to the selected bit.
 | |
|   *         This parameter can be one of the GPIO_PinState enum values:
 | |
|   *            @arg GPIO_PIN_RESET: to clear the port pin
 | |
|   *            @arg GPIO_PIN_SET: to set the port pin
 | |
|   * @retval None
 | |
|   */
 | |
| void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
 | |
| {
 | |
|   /* Check the parameters */
 | |
|   assert_param(IS_GPIO_PIN(GPIO_Pin));
 | |
|   assert_param(IS_GPIO_PIN_ACTION(PinState));
 | |
| 
 | |
|   if (PinState != GPIO_PIN_RESET)
 | |
|   {
 | |
|     GPIOx->BSRR = (uint32_t)GPIO_Pin;
 | |
|   }
 | |
|   else
 | |
|   {
 | |
|     GPIOx->BRR = (uint32_t)GPIO_Pin;
 | |
|   }
 | |
| }
 | |
| 
 | |
| /**
 | |
|   * @brief  Set and clear several pins of a dedicated port in same cycle.
 | |
|   * @note   This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify
 | |
|   *         accesses.
 | |
|   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
 | |
|   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
 | |
|   * @param  PinReset specifies the port bits to be reset
 | |
|   *         This parameter can be any combination of GPIO_Pin_x where x can be (0..15) or zero.
 | |
|   * @param  PinSet specifies the port bits to be set
 | |
|   *         This parameter can be any combination of GPIO_Pin_x where x can be (0..15) or zero.
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|   * @note   Both PinReset and PinSet combinations shall not get any common bit, else
 | |
|   *         assert would be triggered.
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|   * @note   At least one of the two parameters used to set or reset shall be different from zero.
 | |
|   * @retval None
 | |
|   */
 | |
| void HAL_GPIO_WriteMultipleStatePin(GPIO_TypeDef *GPIOx, uint16_t PinReset, uint16_t PinSet)
 | |
| {
 | |
|   uint32_t tmp;
 | |
| 
 | |
|   /* Check the parameters */
 | |
|   /* Make sure at least one parameter is different from zero and that there is no common pin */
 | |
|   assert_param(IS_GPIO_PIN((uint32_t)PinReset | (uint32_t)PinSet));
 | |
|   assert_param(IS_GPIO_COMMON_PIN(PinReset, PinSet));
 | |
| 
 | |
|   tmp = (((uint32_t)PinReset << 16) | PinSet);
 | |
|   GPIOx->BSRR = tmp;
 | |
| }
 | |
| 
 | |
| /**
 | |
|   * @brief  Toggle the specified GPIO pin.
 | |
|   * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for STM32H5 family
 | |
|   * @param  GPIO_Pin: specifies the pin to be toggled.
 | |
|   * @retval None
 | |
|   */
 | |
| void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
 | |
| {
 | |
|   uint32_t odr;
 | |
| 
 | |
|   /* Check the parameters */
 | |
|   assert_param(IS_GPIO_PIN(GPIO_Pin));
 | |
| 
 | |
|   /* get current Output Data Register value */
 | |
|   odr = GPIOx->ODR;
 | |
| 
 | |
|   /* Set selected pins that were at low level, and reset ones that were high */
 | |
|   GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
 | |
| }
 | |
| 
 | |
| /**
 | |
|   * @brief  Lock GPIO Pins configuration registers.
 | |
|   * @note   The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
 | |
|   *         GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
 | |
|   * @note   The configuration of the locked GPIO pins can no longer be modified
 | |
|   *         until the next reset.
 | |
|   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
 | |
|   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
 | |
|   * @param  GPIO_Pin: specifies the port bits to be locked.
 | |
|   *         This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
 | |
|   * @retval None
 | |
|   */
 | |
| HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
 | |
| {
 | |
|   __IO uint32_t tmp = GPIO_LCKR_LCKK;
 | |
| 
 | |
|   /* Check the parameters */
 | |
|   assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx));
 | |
|   assert_param(IS_GPIO_PIN(GPIO_Pin));
 | |
| 
 | |
|   /* Apply lock key write sequence */
 | |
|   tmp |= GPIO_Pin;
 | |
|   /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
 | |
|   GPIOx->LCKR = tmp;
 | |
|   /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
 | |
|   GPIOx->LCKR = GPIO_Pin;
 | |
|   /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
 | |
|   GPIOx->LCKR = tmp;
 | |
|   /* Read LCKK bit*/
 | |
|   tmp = GPIOx->LCKR;
 | |
| 
 | |
|   /* read again in order to confirm lock is active */
 | |
|   if ((GPIOx->LCKR & GPIO_LCKR_LCKK) != GPIO_LCKR_LCKK)
 | |
|   {
 | |
|     return HAL_ERROR;
 | |
|   }
 | |
|   return HAL_OK;
 | |
| }
 | |
| 
 | |
| /**
 | |
|   * @brief  Enable speed optimization for several pin of dedicated port.
 | |
|   * @note   Not all I/Os support the HSLV mode. Refer to the I/O structure in the corresponding
 | |
|   *         datasheet for the list of I/Os supporting this feature. Other I/Os HSLV configuration must
 | |
|   *         be kept at reset value.
 | |
|   * @note   It must be used only if the I/O supply voltage is below 2.7 V.
 | |
|   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
 | |
|   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
 | |
|   * @param  GPIO_Pin: specifies the port bit to be written.
 | |
|   *         This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
 | |
|   * @retval None
 | |
|   */
 | |
| void HAL_GPIO_EnableHighSPeedLowVoltage(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
 | |
| {
 | |
|   /* Check the parameters */
 | |
|   assert_param(IS_GPIO_PIN(GPIO_Pin));
 | |
|   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
 | |
| 
 | |
|   /* Set HSLVR gpio pin */
 | |
|   SET_BIT(GPIOx->HSLVR, GPIO_Pin);
 | |
| }
 | |
| 
 | |
| /**
 | |
|   * @brief  Disable speed optimization for several pin of dedicated port.
 | |
|   * @note   Not all I/Os support the HSLV mode. Refer to the I/O structure in the corresponding
 | |
|   *         datasheet for the list of I/Os supporting this feature. Other I/Os HSLV configuration must
 | |
|   *         be kept at reset value.
 | |
|   * @note   It must be used only if the I/O supply voltage is below 2.7 V.
 | |
|   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
 | |
|   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
 | |
|   * @param  GPIO_Pin: specifies the port bit to be written.
 | |
|   *         This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
 | |
|   * @retval None
 | |
|   */
 | |
| void HAL_GPIO_DisableHighSPeedLowVoltage(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
 | |
| {
 | |
|   /* Check the parameters */
 | |
|   assert_param(IS_GPIO_PIN(GPIO_Pin));
 | |
|   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
 | |
| 
 | |
|   /* Clear HSLVR gpio pin */
 | |
|   CLEAR_BIT(GPIOx->HSLVR, GPIO_Pin);
 | |
| }
 | |
| 
 | |
| /**
 | |
|   * @brief  Handle EXTI interrupt request.
 | |
|   * @param  GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
 | |
|   * @retval None
 | |
|   */
 | |
| void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
 | |
| {
 | |
|   /* EXTI line interrupt detected */
 | |
|   if (__HAL_GPIO_EXTI_GET_RISING_IT(GPIO_Pin) != 0U)
 | |
|   {
 | |
|     __HAL_GPIO_EXTI_CLEAR_RISING_IT(GPIO_Pin);
 | |
|     HAL_GPIO_EXTI_Rising_Callback(GPIO_Pin);
 | |
|   }
 | |
| 
 | |
|   if (__HAL_GPIO_EXTI_GET_FALLING_IT(GPIO_Pin) != 0U)
 | |
|   {
 | |
|     __HAL_GPIO_EXTI_CLEAR_FALLING_IT(GPIO_Pin);
 | |
|     HAL_GPIO_EXTI_Falling_Callback(GPIO_Pin);
 | |
|   }
 | |
| }
 | |
| 
 | |
| /**
 | |
|   * @brief  EXTI line rising detection callback.
 | |
|   * @param  GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
 | |
|   * @retval None
 | |
|   */
 | |
| __weak void HAL_GPIO_EXTI_Rising_Callback(uint16_t GPIO_Pin)
 | |
| {
 | |
|   /* Prevent unused argument(s) compilation warning */
 | |
|   UNUSED(GPIO_Pin);
 | |
| 
 | |
|   /* NOTE: This function should not be modified, when the callback is needed,
 | |
|            the HAL_GPIO_EXTI_Rising_Callback could be implemented in the user file
 | |
|    */
 | |
| }
 | |
| 
 | |
| /**
 | |
|   * @brief  EXTI line falling detection callback.
 | |
|   * @param  GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
 | |
|   * @retval None
 | |
|   */
 | |
| __weak void HAL_GPIO_EXTI_Falling_Callback(uint16_t GPIO_Pin)
 | |
| {
 | |
|   /* Prevent unused argument(s) compilation warning */
 | |
|   UNUSED(GPIO_Pin);
 | |
| 
 | |
|   /* NOTE: This function should not be modified, when the callback is needed,
 | |
|            the HAL_GPIO_EXTI_Falling_Callback could be implemented in the user file
 | |
|    */
 | |
| }
 | |
| 
 | |
| /**
 | |
|   * @}
 | |
|   */
 | |
| 
 | |
| #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 | |
| 
 | |
| /** @defgroup GPIO_Exported_Functions_Group3 IO attributes management functions
 | |
|   *  @brief GPIO attributes management functions.
 | |
|   *
 | |
| @verbatim
 | |
|  ===============================================================================
 | |
|                        ##### IO attributes functions #####
 | |
|  ===============================================================================
 | |
| 
 | |
| @endverbatim
 | |
|   * @{
 | |
|   */
 | |
| 
 | |
| /**
 | |
|   * @brief  Configure the GPIO pins attributes.
 | |
|   * @note   Available attributes are to secure GPIO pin(s), so this function is
 | |
|   *         only available in secure
 | |
|   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
 | |
|   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
 | |
|   * @param  GPIO_Pin: specifies the pin(s) to configure the secure attribute
 | |
|   * @param  PinAttributes: specifies the pin(s) to be set in secure mode, other being set non secured.
 | |
|   * @retval None
 | |
|   */
 | |
| void HAL_GPIO_ConfigPinAttributes(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, uint32_t PinAttributes)
 | |
| {
 | |
|   uint32_t tmp;
 | |
|   uint32_t iocurrent;
 | |
|   uint32_t position = 0U;
 | |
| 
 | |
|   /* Check the parameters */
 | |
|   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
 | |
|   assert_param(IS_GPIO_PIN(GPIO_Pin));
 | |
|   assert_param(IS_GPIO_PIN_ATTRIBUTES(PinAttributes));
 | |
| 
 | |
|   tmp = GPIOx->SECCFGR;
 | |
| 
 | |
|   /* Configure the port pins */
 | |
|   while ((GPIO_Pin >> position) != 0U)
 | |
|   {
 | |
|     /* Get current io position */
 | |
|     iocurrent = GPIO_Pin & (1UL << position);
 | |
| 
 | |
|     if (iocurrent != 0U)
 | |
|     {
 | |
|       /* Configure the IO secure attribute */
 | |
|       tmp &= ~(GPIO_SECCFGR_SEC0 << position);
 | |
|       tmp |= (PinAttributes << position);
 | |
|     }
 | |
|     position++;
 | |
|   }
 | |
| 
 | |
|   /* Set secure attributes */
 | |
|   GPIOx->SECCFGR = tmp;
 | |
| }
 | |
| 
 | |
| /**
 | |
|   * @brief  Get the GPIO pins attributes.
 | |
|   * @note   Available attributes are to secure GPIO pin(s), so this function is
 | |
|   *         only available in secure
 | |
|   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
 | |
|   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
 | |
|   * @param  GPIO_Pin: specifies the single pin to get the secure attribute from
 | |
|   * @param  pPinAttributes: pointer to return the pin attributes.
 | |
|   * @retval HAL Status.
 | |
|   */
 | |
| HAL_StatusTypeDef HAL_GPIO_GetConfigPinAttributes(const GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin,
 | |
|                                                   uint32_t *pPinAttributes)
 | |
| {
 | |
|   uint32_t iocurrent;
 | |
|   uint32_t position = 0U;
 | |
| 
 | |
|   /* Check null pointer */
 | |
|   if (pPinAttributes == NULL)
 | |
|   {
 | |
|     return HAL_ERROR;
 | |
|   }
 | |
| 
 | |
|   /* Check the parameters */
 | |
|   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
 | |
|   assert_param(IS_GPIO_SINGLE_PIN(GPIO_Pin));
 | |
| 
 | |
|   /* Get secure attribute of the port pin */
 | |
|   while ((GPIO_Pin >> position) != 0U)
 | |
|   {
 | |
|     /* Get current io position */
 | |
|     iocurrent = GPIO_Pin & (1UL << position);
 | |
| 
 | |
|     if (iocurrent != 0U)
 | |
|     {
 | |
|       /* Get the IO secure attribute */
 | |
|       if ((GPIOx->SECCFGR & (GPIO_SECCFGR_SEC0 << position)) != 0U)
 | |
|       {
 | |
|         *pPinAttributes = GPIO_PIN_SEC;
 | |
|       }
 | |
|       else
 | |
|       {
 | |
|         *pPinAttributes = GPIO_PIN_NSEC;
 | |
|       }
 | |
| 
 | |
|       break;
 | |
|     }
 | |
|     position++;
 | |
|   }
 | |
| 
 | |
|   return HAL_OK;
 | |
| }
 | |
| 
 | |
| /**
 | |
|   * @}
 | |
|   */
 | |
| 
 | |
| #endif /* __ARM_FEATURE_CMSE */
 | |
| 
 | |
| 
 | |
| /**
 | |
|   * @}
 | |
|   */
 | |
| 
 | |
| #endif /* HAL_GPIO_MODULE_ENABLED */
 | |
| /**
 | |
|   * @}
 | |
|   */
 | |
| 
 | |
| /**
 | |
|   * @}
 | |
|   */
 |