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SocChina2025
562
Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_pwr_ex.h
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562
Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_pwr_ex.h
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@@ -0,0 +1,562 @@
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/**
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******************************************************************************
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* @file stm32h5xx_hal_pwr_ex.h
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* @author MCD Application Team
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* @brief Header file of PWR HAL Extended module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H5xx_HAL_PWR_EX_H
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#define STM32H5xx_HAL_PWR_EX_H
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h5xx_hal_def.h"
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/** @addtogroup STM32H5xx_HAL_Driver
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* @{
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*/
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/** @addtogroup PWREx
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup PWREx_Exported_Types PWR Extended Exported Types
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* @{
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*/
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/**
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* @brief PWREx AVD configuration structure definition
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*/
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typedef struct
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{
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uint32_t AVDLevel; /*!< AVDLevel: Specifies the AVD detection level. This
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parameter can be a value of @ref
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PWREx_AVD_detection_level
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*/
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uint32_t Mode; /*!< Mode: Specifies the EXTI operating mode for the AVD
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event. This parameter can be a value of @ref
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PWREx_AVD_Mode.
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*/
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} PWREx_AVDTypeDef;
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/**
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* @brief PWREx Wakeup pin configuration structure definition
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*/
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typedef struct
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{
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uint32_t WakeUpPin; /*!< WakeUpPin: Specifies the Wake-Up pin to be enabled.
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This parameter can be a value of @ref
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PWREx_WakeUp_Pins
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*/
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uint32_t PinPolarity; /*!< PinPolarity: Specifies the Wake-Up pin polarity.
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This parameter can be a value of @ref
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PWREx_PIN_Polarity
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*/
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uint32_t PinPull; /*!< PinPull: Specifies the Wake-Up pin pull. This
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parameter can be a value of @ref
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PWREx_PIN_Pull
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*/
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} PWREx_WakeupPinTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants
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* @{
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*/
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/** @defgroup PWREx_Supply_configuration PWREx Supply configuration
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* @{
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*/
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#define PWR_EXTERNAL_SOURCE_SUPPLY PWR_SCCR_BYPASS /*!< The SMPS disabled and the LDO Bypass. The Core domains
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are supplied from an external source */
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#if defined (SMPS)
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#define PWR_SUPPLY_CONFIG_MASK (PWR_SCCR_SMPSEN | PWR_SCCR_LDOEN | PWR_SCCR_BYPASS)
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#else
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#define PWR_SUPPLY_CONFIG_MASK (PWR_SCCR_LDOEN | PWR_SCCR_BYPASS)
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#endif /* defined (SMPS) */
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/**
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* @}
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*/
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/** @defgroup PWREx_PIN_Polarity PWREx Pin Polarity configuration
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* @{
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*/
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#define PWR_PIN_POLARITY_HIGH (0x00000000U)
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#define PWR_PIN_POLARITY_LOW (0x00000001U)
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/**
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* @}
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*/
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/** @defgroup PWREx_PIN_Pull PWREx Pin Pull configuration
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* @{
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*/
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#define PWR_PIN_NO_PULL (0x00000000U)
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#define PWR_PIN_PULL_UP (0x00000001U)
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#define PWR_PIN_PULL_DOWN (0x00000002U)
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/**
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* @}
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*/
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/** @defgroup PWREx_AVD_detection_level PWREx AVD detection level
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* @{
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*/
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#define PWR_AVDLEVEL_0 (0x00000000U) /*!< Analog voltage detector level 0 selection : 1V7 */
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#define PWR_AVDLEVEL_1 PWR_VMCR_ALS_0 /*!< Analog voltage detector level 1 selection : 2V1 */
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#define PWR_AVDLEVEL_2 PWR_VMCR_ALS_1 /*!< Analog voltage detector level 2 selection : 2V5 */
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#define PWR_AVDLEVEL_3 PWR_VMCR_ALS /*!< Analog voltage detector level 3 selection : 2V8 */
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/**
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* @}
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*/
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/** @defgroup PWREx_AVD_Mode PWREx AVD Mode
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* @{
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*/
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#define PWR_AVD_MODE_NORMAL (0x00000000U)/*!< Basic mode is used */
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#define PWR_AVD_MODE_IT_RISING (0x00010001U)/*!< External Interrupt Mode with Rising edge trigger detection*/
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#define PWR_AVD_MODE_IT_FALLING (0x00010002U)/*!< External Interrupt Mode with
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Falling edge trigger detection */
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#define PWR_AVD_MODE_IT_RISING_FALLING (0x00010003U)/*!< External Interrupt Mode with
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Rising/Falling edge trigger detection */
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#define PWR_AVD_MODE_EVENT_RISING (0x00020001U)/*!< Event Mode with Rising edge trigger detection */
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#define PWR_AVD_MODE_EVENT_FALLING (0x00020002U)/*!< Event Mode with Falling edge trigger detection */
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#define PWR_AVD_MODE_EVENT_RISING_FALLING (0x00020003U)/*!< Event Mode with Rising/Falling edge trigger detection */
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/**
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* @}
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*/
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/** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale
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* @{
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*/
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#define PWR_REGULATOR_VOLTAGE_SCALE0 PWR_VOSCR_VOS /*!< Voltage scaling range 0 */
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#define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_VOSCR_VOS_1 /*!< Voltage scaling range 1 */
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#define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_VOSCR_VOS_0 /*!< Voltage scaling range 2 */
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#define PWR_REGULATOR_VOLTAGE_SCALE3 (0U) /*!< Voltage scaling range 3 */
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/**
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* @}
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*/
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/** @defgroup PWREx_System_Stop_Mode_Voltage_Scale PWREx System Stop Mode Voltage Scale
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* @{
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*/
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#define PWR_REGULATOR_SVOS_SCALE5 (PWR_PMCR_SVOS_0)
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#define PWR_REGULATOR_SVOS_SCALE4 (PWR_PMCR_SVOS_1)
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#define PWR_REGULATOR_SVOS_SCALE3 (PWR_PMCR_SVOS_0 | PWR_PMCR_SVOS_1)
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/**
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* @}
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*/
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/** @defgroup PWREx_VBAT_Battery_Charging_Selection PWR Extended Battery Charging Resistor Selection
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* @{
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*/
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#define PWR_BATTERY_CHARGING_RESISTOR_5 (0U) /*!< VBAT charging through a 5 kOhms resistor */
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#define PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_BDCR_VBRS /*!< VBAT charging through a 1.5 kOhms resistor */
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/**
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* @}
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*/
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/** @defgroup PWREx_Memory_Shut_Off Memory shut-off block selection
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* @{
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*/
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#define PWR_RAM1_MEMORY_BLOCK PWR_PMCR_SRAM1SO /*!< RAM1 shut-off control in Stop mode */
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#if defined (PWR_PMCR_SRAM2_16SO)
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#define PWR_RAM2_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16SO /*!< RAM2 16k byte shut-off control in Stop mode */
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#define PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO /*!< RAM2 48k byte shut-off control in Stop mode */
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#elif defined (PWR_PMCR_SRAM2_16LSO)
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#define PWR_RAM2_LOW_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16LSO /*!< RAM2 low 16k byte shut-off control in Stop mode */
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#define PWR_RAM2_HIGH_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16HSO /*!< RAM2 High 16k byte shut-off control in Stop mode */
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#define PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO /*!< RAM2 48k byte shut-off control in Stop mode */
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#else
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#define PWR_RAM2_MEMORY_BLOCK PWR_PMCR_SRAM2SO /*!< RAM2 shut-off control in Stop mode */
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#endif /* PWR_PMCR_SRAM2_16SO */
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#if defined (PWR_PMCR_SRAM3SO)
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#define PWR_RAM3_MEMORY_BLOCK PWR_PMCR_SRAM3SO /*!< RAM3 shut-off control in Stop mode */
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#endif /* PWR_PMCR_SRAM3SO */
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#if defined (PWR_PMCR_ETHERNETSO)
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#define PWR_ETHERNET_MEMORY_BLOCK PWR_PMCR_ETHERNETSO /*!< Ethernet shut-off control in Stop mode */
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#endif /* PWR_PMCR_ETHERNETSO */
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/**
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* @}
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*/
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/** @defgroup PWREx_AVD_EXTI_Line PWREx AVD EXTI Line 16
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* @{
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*/
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#define PWR_EXTI_LINE_AVD EXTI_IMR1_IM16 /*!< External interrupt line 16
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Connected to the AVD EXTI Line */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macros -----------------------------------------------------------*/
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/** @defgroup PWREx_Exported_Macros PWR Extended Exported Macros
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* @{
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*/
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/**
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* @brief Enable the AVD EXTI Line 16.
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* @retval None.
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*/
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#define __HAL_PWR_AVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD)
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/**
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* @brief Disable the AVD EXTI Line 16
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* @retval None.
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*/
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#define __HAL_PWR_AVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD)
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/**
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* @brief Enable event on AVD EXTI Line 16.
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* @retval None.
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*/
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#define __HAL_PWR_AVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD)
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/**
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* @brief Disable event on AVD EXTI Line 16.
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* @retval None.
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*/
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#define __HAL_PWR_AVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD)
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/**
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* @brief Enable the AVD Extended Interrupt Rising Trigger.
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* @retval None.
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*/
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#define __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD)
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/**
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* @brief Disable the AVD Extended Interrupt Rising Trigger.
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* @retval None.
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*/
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#define __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD)
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/**
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* @brief Enable the AVD Extended Interrupt Falling Trigger.
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* @retval None.
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*/
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#define __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD)
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/**
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* @brief Disable the AVD Extended Interrupt Falling Trigger.
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* @retval None.
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*/
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#define __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD)
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/**
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* @brief Enable the AVD Extended Interrupt Rising and Falling Trigger.
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* @retval None.
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*/
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#define __HAL_PWR_AVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
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do { \
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__HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE(); \
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__HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE(); \
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} while(0);
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/**
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* @brief Disable the AVD Extended Interrupt Rising & Falling Trigger.
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* @retval None.
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*/
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#define __HAL_PWR_AVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
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do { \
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__HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE(); \
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__HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE(); \
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} while(0);
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/**
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* @brief Check whether the specified AVD EXTI Rising interrupt flag is set or not.
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* @retval EXTI AVD Line Status.
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*/
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#define __HAL_PWR_PVD_AVD_EXTI_GET_RISING_FLAG() ((READ_BIT(EXTI->RPR1, PWR_EXTI_LINE_AVD)\
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== PWR_EXTI_LINE_AVD) ? 1UL : 0UL)
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/**
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* @brief Check whether the specified AVD EXTI Falling interrupt flag is set or not.
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* @retval EXTI AVD Line Status.
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*/
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#define __HAL_PWR_PVD_AVD_EXTI_GET_FALLING_FLAG() ((READ_BIT(EXTI->FPR1, PWR_EXTI_LINE_AVD)\
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== PWR_EXTI_LINE_AVD) ? 1UL : 0UL)
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/**
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* @brief Clear the AVD EXTI flag.
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* @retval None.
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*/
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#define __HAL_PWR_PVD_AVD_EXTI_CLEAR_FLAG() \
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do \
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{ \
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WRITE_REG(EXTI->RPR1, PWR_EXTI_LINE_AVD); \
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WRITE_REG(EXTI->FPR1, PWR_EXTI_LINE_AVD); \
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} while(0)
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/**
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* @brief Generates a Software interrupt on AVD EXTI line.
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* @retval None.
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*/
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#define __HAL_PWR_AVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_AVD)
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/**
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* @brief Configure the main internal regulator output voltage.
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* @note This macro is similar to HAL_PWREx_ControlVoltageScaling() API but
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* doesn't check whether or not VOSREADY flag is set. User may resort
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* to __HAL_PWR_GET_FLAG() macro to check VOSF bit state.
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* @param __REGULATOR__ : Specifies the regulator output voltage to achieve a
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* tradeoff between performance and power consumption.
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* This parameter can be one of the following values :
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* @arg @ref PWR_REGULATOR_VOLTAGE_SCALE0 : Regulator voltage output scale 0.
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* Provides a typical output voltage at 1.2 V.
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* Used when system clock frequency is up to 160 MHz.
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* @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 : Regulator voltage output scale 1.
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* Provides a typical output voltage at 1.1 V.
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* Used when system clock frequency is up to 100 MHz.
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* @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 : Regulator voltage output scale 2.
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* Provides a typical output voltage at 1.0 V.
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* Used when system clock frequency is up to 50 MHz.
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* @arg @ref PWR_REGULATOR_VOLTAGE_SCALE3 : Regulator voltage output scale 3.
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* Provides a typical output voltage at 0.9 V.
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* Used when system clock frequency is up to 24 MHz.
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* @retval None.
|
||||
*/
|
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#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) \
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do \
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{ \
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__IO uint32_t tmpreg; \
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MODIFY_REG(PWR->VOSCR, PWR_VOSCR_VOS, (__REGULATOR__)); \
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/* Delay after an RCC peripheral clock enabling */ \
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tmpreg = READ_BIT(PWR->VOSCR, PWR_VOSCR_VOS); \
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UNUSED(tmpreg); \
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} while(0)
|
||||
/**
|
||||
* @}
|
||||
*/
|
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||||
/* Private constants ---------------------------------------------------------*/
|
||||
|
||||
/** @defgroup PWREx_Private_Constants PWR Extended Private Constants
|
||||
* @{
|
||||
*/
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||||
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/** @defgroup PWREx_AVD_Mode_Mask PWR Extended AVD Mode Mask
|
||||
* @{
|
||||
*/
|
||||
#define AVD_MODE_IT (0x00010000U)
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#define AVD_MODE_EVT (0x00020000U)
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#define AVD_RISING_EDGE (0x00000001U)
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#define AVD_FALLING_EDGE (0x00000002U)
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#define AVD_RISING_FALLING_EDGE (0x00000003U)
|
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/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup PWREx_Private_Macros PWR Extended Private Macros
|
||||
* @{
|
||||
*/
|
||||
/* Check PWR regulator configuration parameter */
|
||||
#define IS_PWR_SUPPLY(PWR_SOURCE) ((PWR_SOURCE) == PWR_EXTERNAL_SOURCE_SUPPLY)
|
||||
|
||||
/* Check wake up pin polarity parameter */
|
||||
#define IS_PWR_WAKEUP_PIN_POLARITY(POLARITY) (((POLARITY) == PWR_PIN_POLARITY_HIGH) ||\
|
||||
((POLARITY) == PWR_PIN_POLARITY_LOW))
|
||||
|
||||
/* Check wake up pin pull configuration parameter */
|
||||
#define IS_PWR_WAKEUP_PIN_PULL(PULL) (((PULL) == PWR_PIN_NO_PULL) ||\
|
||||
((PULL) == PWR_PIN_PULL_UP) ||\
|
||||
((PULL) == PWR_PIN_PULL_DOWN))
|
||||
|
||||
/* Check wake up flag parameter */
|
||||
#define IS_PWR_WAKEUP_FLAG(FLAG) (((FLAG) == PWR_WAKEUP_FLAG1) ||\
|
||||
((FLAG) == PWR_WAKEUP_FLAG2) ||\
|
||||
((FLAG) == PWR_WAKEUP_FLAG3) ||\
|
||||
((FLAG) == PWR_WAKEUP_FLAG4) ||\
|
||||
((FLAG) == PWR_WAKEUP_FLAG5) ||\
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||||
((FLAG) == PWR_WAKEUP_FLAG6) ||\
|
||||
((FLAG) == PWR_WAKEUP_FLAG_ALL))
|
||||
|
||||
/* Voltage scaling range check macro */
|
||||
#define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE0) ||\
|
||||
((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) ||\
|
||||
((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) ||\
|
||||
((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
|
||||
|
||||
/* Check PWR regulator configuration in STOP mode parameter */
|
||||
#define IS_PWR_STOP_MODE_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE3) ||\
|
||||
((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE4) ||\
|
||||
((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE5))
|
||||
|
||||
/* Battery charging resistor selection check macro */
|
||||
#define IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) (((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_5) ||\
|
||||
((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_1_5))
|
||||
|
||||
/* Check memory block parameter */
|
||||
#if defined (PWR_PMCR_SRAM2_16SO)
|
||||
#define IS_PWR_MEMORY_BLOCK(BLOCK) (((BLOCK) == PWR_ETHERNET_MEMORY_BLOCK) || \
|
||||
((BLOCK) == PWR_RAM3_MEMORY_BLOCK) || \
|
||||
((BLOCK) == PWR_RAM2_16_MEMORY_BLOCK) || \
|
||||
((BLOCK) == PWR_RAM2_48_MEMORY_BLOCK) || \
|
||||
((BLOCK) == PWR_RAM1_MEMORY_BLOCK))
|
||||
#elif defined (PWR_PMCR_SRAM2_16LSO)
|
||||
#define IS_PWR_MEMORY_BLOCK(BLOCK) (((BLOCK) == PWR_RAM3_MEMORY_BLOCK) || \
|
||||
((BLOCK) == PWR_RAM2_LOW_16_MEMORY_BLOCK) || \
|
||||
((BLOCK) == PWR_RAM2_HIGH_16_MEMORY_BLOCK) || \
|
||||
((BLOCK) == PWR_RAM2_48_MEMORY_BLOCK) || \
|
||||
((BLOCK) == PWR_RAM1_MEMORY_BLOCK))
|
||||
#else
|
||||
#define IS_PWR_MEMORY_BLOCK(BLOCK) (((BLOCK) == PWR_RAM2_MEMORY_BLOCK) || \
|
||||
((BLOCK) == PWR_RAM1_MEMORY_BLOCK))
|
||||
#endif /* PWR_PMCR_SRAM2_16SO */
|
||||
|
||||
/* Check wake up flag parameter */
|
||||
#define IS_PWR_AVD_LEVEL(LEVEL) (((LEVEL) == PWR_AVDLEVEL_0) ||\
|
||||
((LEVEL) == PWR_AVDLEVEL_1) ||\
|
||||
((LEVEL) == PWR_AVDLEVEL_2) ||\
|
||||
((LEVEL) == PWR_AVDLEVEL_3))
|
||||
|
||||
/* Check AVD mode parameter */
|
||||
#define IS_PWR_AVD_MODE(MODE) (((MODE) == PWR_AVD_MODE_IT_RISING) ||\
|
||||
((MODE) == PWR_AVD_MODE_IT_FALLING) ||\
|
||||
((MODE) == PWR_AVD_MODE_IT_RISING_FALLING) ||\
|
||||
((MODE) == PWR_AVD_MODE_EVENT_RISING) ||\
|
||||
((MODE) == PWR_AVD_MODE_EVENT_FALLING) ||\
|
||||
((MODE) == PWR_AVD_MODE_NORMAL) ||\
|
||||
((MODE) == PWR_AVD_MODE_EVENT_RISING_FALLING))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup PWREx_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup PWREx_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_PWREx_ConfigSupply(uint32_t SupplySource);
|
||||
uint32_t HAL_PWREx_GetSupplyConfig(void);
|
||||
HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
|
||||
uint32_t HAL_PWREx_GetVoltageRange(void);
|
||||
HAL_StatusTypeDef HAL_PWREx_ControlStopModeVoltageScaling(uint32_t VoltageScaling);
|
||||
uint32_t HAL_PWREx_GetStopModeVoltageRange(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup PWREx_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
void HAL_PWREx_ConfigAVD(const PWREx_AVDTypeDef *sConfigAVD);
|
||||
void HAL_PWREx_EnableAVD(void);
|
||||
void HAL_PWREx_DisableAVD(void);
|
||||
#if defined (PWR_USBSCR_USB33DEN)
|
||||
void HAL_PWREx_EnableUSBVoltageDetector(void);
|
||||
void HAL_PWREx_DisableUSBVoltageDetector(void);
|
||||
void HAL_PWREx_EnableVddUSB(void);
|
||||
void HAL_PWREx_DisableVddUSB(void);
|
||||
#endif /* PWR_USBSCR_USB33DEN */
|
||||
void HAL_PWREx_EnableMonitoring(void);
|
||||
void HAL_PWREx_DisableMonitoring(void);
|
||||
void HAL_PWREx_EnableUCPDStandbyMode(void);
|
||||
void HAL_PWREx_DisableUCPDStandbyMode(void);
|
||||
void HAL_PWREx_EnableUCPDDeadBattery(void);
|
||||
void HAL_PWREx_DisableUCPDDeadBattery(void);
|
||||
void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorValue);
|
||||
void HAL_PWREx_DisableBatteryCharging(void);
|
||||
void HAL_PWREx_EnableAnalogBooster(void);
|
||||
void HAL_PWREx_DisableAnalogBooster(void);
|
||||
void HAL_PWREx_PVD_AVD_IRQHandler(void);
|
||||
void HAL_PWREx_PVD_AVD_Rising_Callback(void);
|
||||
void HAL_PWREx_PVD_AVD_Falling_Callback(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup PWREx_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
|
||||
void HAL_PWREx_EnableWakeUpPin(const PWREx_WakeupPinTypeDef *sPinParams);
|
||||
void HAL_PWREx_DisableWakeUpPin(uint32_t WakeUpPinx);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup PWREx_Exported_Functions_Group4
|
||||
* @{
|
||||
*/
|
||||
void HAL_PWREx_EnableFlashPowerDown(void);
|
||||
void HAL_PWREx_DisableFlashPowerDown(void);
|
||||
void HAL_PWREx_EnableMemoryShutOff(uint32_t MemoryBlock);
|
||||
void HAL_PWREx_DisableMemoryShutOff(uint32_t MemoryBlock);
|
||||
HAL_StatusTypeDef HAL_PWREx_EnableBkupRAMRetention(void);
|
||||
void HAL_PWREx_DisableBkupRAMRetention(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup PWREx_Exported_Functions_Group5
|
||||
* @{
|
||||
*/
|
||||
void HAL_PWREx_EnableStandbyIORetention(void);
|
||||
void HAL_PWREx_DisableStandbyIORetention(void);
|
||||
void HAL_PWREx_EnableStandbyJTAGIORetention(void);
|
||||
void HAL_PWREx_DisableStandbyJTAGIORetention(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
|
||||
#endif /* STM32H5xx_HAL_PWR_EX_H */
|
||||
Reference in New Issue
Block a user