845 lines
28 KiB
C
845 lines
28 KiB
C
/**
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******************************************************************************
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* @file stm32h5xx_hal_pwr_ex.c
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* @author MCD Application Team
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* @brief Extended PWR HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the Power Controller extension peripheral :
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* + Power Supply Control Functions
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* + Voltage Monitoring Functions
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* + Wakeup Pins configuration Functions
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* + Memories Retention Functions
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* + IO and JTAG Retention Functions
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h5xx_hal.h"
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/** @addtogroup STM32H5xx_HAL_Driver
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* @{
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*/
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/** @defgroup PWREx PWREx
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* @brief PWR Extended HAL module driver
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* @{
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*/
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#if defined (HAL_PWR_MODULE_ENABLED)
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @defgroup PWR_Extended_Private_Defines PWR Extended Private Defines
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* @{
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*/
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/* PORTI pins mask */
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#define PWR_PORTI_AVAILABLE_PINS (0xFFU)
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/*!< Time out value of flags setting */
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#define PWR_FLAG_SETTING_DELAY (0x32U)
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/** @defgroup PWR_PVM_Mode_Mask PWR PVM Mode Mask
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* @{
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*/
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#define PVM_RISING_EDGE (0x01U) /*!< Mask for rising edge set as PVM trigger */
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#define PVM_FALLING_EDGE (0x02U) /*!< Mask for falling edge set as PVM trigger */
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#define PVM_MODE_IT (0x04U) /*!< Mask for interruption yielded by PVM threshold crossing */
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#define PVM_MODE_EVT (0x08U) /*!< Mask for event yielded by PVM threshold crossing */
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/**
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* @}
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*/
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/** @defgroup PWREx_WakeUp_Pins_Offsets PWREx Wake-Up Pins offsets
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* @{
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*/
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/* Wake-Up Pins PWR Pin Pull shift offsets */
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#define PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET (2U)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions
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* @{
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*/
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/** @defgroup PWREx_Exported_Functions_Group1 Power Supply Control Functions
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* @brief Power supply control functions
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*
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@verbatim
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===============================================================================
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##### Power supply control functions #####
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===============================================================================
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[..]
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@endverbatim
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* @{
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*/
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/**
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* @brief Configure the system Power Supply.
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* @param SupplySource : Specifies the Power Supply source to set after a
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* system startup.
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* This parameter can be one of the following values :
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* @arg PWR_EXTERNAL_SOURCE_SUPPLY : The SMPS and the LDO are
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* Bypassed. The Vcore Power
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* Domains are supplied from
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* external source.
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* @retval HAL status.
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*/
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HAL_StatusTypeDef HAL_PWREx_ConfigSupply(uint32_t SupplySource)
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{
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uint32_t tickstart;
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/* Check the parameters */
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assert_param(IS_PWR_SUPPLY(SupplySource));
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if ((PWR->SCCR & PWR_SCCR_BYPASS) != (PWR_SCCR_BYPASS))
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{
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/* Set the power supply configuration */
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MODIFY_REG(PWR->SCCR, PWR_SUPPLY_CONFIG_MASK, SupplySource);
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/* Get tick */
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tickstart = HAL_GetTick();
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/* Wait till voltage level flag is set */
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while (__HAL_PWR_GET_FLAG(PWR_FLAG_ACTVOSRDY) == 0U)
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{
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if ((HAL_GetTick() - tickstart) > PWR_FLAG_SETTING_DELAY)
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{
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return HAL_ERROR;
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}
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}
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}
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return HAL_OK;
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}
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/**
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* @brief Get the power supply configuration.
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* @retval The supply configuration.
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*/
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uint32_t HAL_PWREx_GetSupplyConfig(void)
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{
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return (PWR->SCCR & PWR_SUPPLY_CONFIG_MASK);
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}
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/**
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* @brief Configure the main internal regulator output voltage.
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* @param VoltageScaling : Specifies the regulator output voltage to achieve
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* a tradeoff between performance and power
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* consumption.
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* This parameter can be one of the following values :
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* @arg PWR_REGULATOR_VOLTAGE_SCALE0 : Regulator voltage output
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* Scale 0 mode.
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* @arg PWR_REGULATOR_VOLTAGE_SCALE1 : Regulator voltage output
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* range 1 mode.
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* @arg PWR_REGULATOR_VOLTAGE_SCALE2 : Regulator voltage output
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* range 2 mode.
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* @arg PWR_REGULATOR_VOLTAGE_SCALE3 : Regulator voltage output
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* range 3 mode.
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* @retval HAL Status
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*/
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HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
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{
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uint32_t tickstart = HAL_GetTick();
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/* Check the parameters */
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assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
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/* Get the voltage scaling */
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if ((PWR->VOSSR & PWR_VOSSR_ACTVOS) == (VoltageScaling << 10U))
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{
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/* Old and new voltage scaling configuration match : nothing to do */
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return HAL_OK;
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}
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/* Set the voltage range */
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MODIFY_REG(PWR->VOSCR, PWR_VOSCR_VOS, VoltageScaling);
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/* Wait till voltage level flag is set */
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while (__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == 0U)
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{
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if ((HAL_GetTick() - tickstart) > PWR_FLAG_SETTING_DELAY)
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{
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return HAL_ERROR;
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}
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}
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return HAL_OK;
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}
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/**
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* @brief Get the main internal regulator output voltage. Reflecting the last
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* VOS value applied to the PMU.
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* @retval The current applied VOS selection.
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*/
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uint32_t HAL_PWREx_GetVoltageRange(void)
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{
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/* Get the active voltage scaling */
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return (PWR->VOSSR & PWR_VOSSR_ACTVOS);
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}
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/**
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* @brief Configure the main internal regulator output voltage in STOP mode.
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* @param VoltageScaling : Specifies the regulator output voltage when the
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* system enters Stop mode to achieve a tradeoff between performance
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* and power consumption.
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* This parameter can be one of the following values:
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* @arg PWR_REGULATOR_SVOS_SCALE3 : Regulator voltage output range
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* 3 mode.
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* @arg PWR_REGULATOR_SVOS_SCALE4 : Regulator voltage output range
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* 4 mode.
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* @arg PWR_REGULATOR_SVOS_SCALE5 : Regulator voltage output range
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* 5 mode.
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* @note The Stop mode voltage scaling for SVOS4 and SVOS5 sets the voltage
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* regulator in Low-power (LP) mode to further reduce power consumption.
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* When preselecting SVOS3, the use of the voltage regulator low-power
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* mode (LP) can be selected by LPDS register bit.
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* @note The selected SVOS4 and SVOS5 levels add an additional startup delay
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* when exiting from system Stop mode.
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* @retval HAL Status.
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*/
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HAL_StatusTypeDef HAL_PWREx_ControlStopModeVoltageScaling(uint32_t VoltageScaling)
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{
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/* Check the parameters */
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assert_param(IS_PWR_STOP_MODE_REGULATOR_VOLTAGE(VoltageScaling));
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/* Return the stop mode voltage range */
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MODIFY_REG(PWR->PMCR, PWR_PMCR_SVOS, VoltageScaling);
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return HAL_OK;
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}
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/**
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* @brief Get the main internal regulator output voltage in STOP mode.
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* @retval The actual applied VOS selection.
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*/
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uint32_t HAL_PWREx_GetStopModeVoltageRange(void)
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{
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/* Return the stop voltage scaling */
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return (PWR->PMCR & PWR_PMCR_SVOS);
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}
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/**
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* @}
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*/
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/** @defgroup PWREx_Exported_Functions_Group2 Voltage Monitoring Functions
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* @brief Voltage monitoring functions
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*
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@verbatim
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===============================================================================
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##### Voltage Monitoring Functions #####
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===============================================================================
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[..]
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@endverbatim
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* @{
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*/
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/**
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* @brief Configure the event mode and the voltage threshold detected by the
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* Analog Voltage Detector (AVD).
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* @param sConfigAVD : Pointer to an PWREx_AVDTypeDef structure that contains
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* the configuration information for the AVD.
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* @note Refer to the electrical characteristics of your device datasheet for
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* more details about the voltage threshold corresponding to each
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* detection level.
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* @retval None.
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*/
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void HAL_PWREx_ConfigAVD(const PWREx_AVDTypeDef *sConfigAVD)
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{
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/* Check the parameters */
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assert_param(IS_PWR_AVD_LEVEL(sConfigAVD->AVDLevel));
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assert_param(IS_PWR_AVD_MODE(sConfigAVD->Mode));
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/* Set the ALS[10:9] bits according to AVDLevel value */
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MODIFY_REG(PWR->VMCR, PWR_VMCR_ALS, sConfigAVD->AVDLevel);
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/* Clear any previous config */
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__HAL_PWR_AVD_EXTI_DISABLE_EVENT();
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__HAL_PWR_AVD_EXTI_DISABLE_IT();
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__HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE();
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__HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE();
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/* Configure the interrupt mode */
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if ((sConfigAVD->Mode & AVD_MODE_IT) == AVD_MODE_IT)
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{
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__HAL_PWR_AVD_EXTI_ENABLE_IT();
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}
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/* Configure the event mode */
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if ((sConfigAVD->Mode & AVD_MODE_EVT) == AVD_MODE_EVT)
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{
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__HAL_PWR_AVD_EXTI_ENABLE_EVENT();
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}
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/* Rising edge configuration */
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if ((sConfigAVD->Mode & AVD_RISING_EDGE) == AVD_RISING_EDGE)
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{
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__HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE();
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}
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/* Falling edge configuration */
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if ((sConfigAVD->Mode & AVD_FALLING_EDGE) == AVD_FALLING_EDGE)
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{
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__HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE();
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}
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}
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/**
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* @brief Enable the Analog Voltage Detector (AVD).
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* @retval None.
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*/
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void HAL_PWREx_EnableAVD(void)
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{
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/* Enable the Analog Voltage Detector */
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SET_BIT(PWR->VMCR, PWR_VMCR_AVDEN);
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}
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/**
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* @brief Disable the Analog Voltage Detector(AVD).
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* @retval None.
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*/
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void HAL_PWREx_DisableAVD(void)
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{
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/* Disable the Analog Voltage Detector */
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CLEAR_BIT(PWR->VMCR, PWR_VMCR_AVDEN);
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}
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#if defined (PWR_USBSCR_USB33DEN)
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/**
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* @brief Enable the USB voltage level detector.
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* @retval None.
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*/
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void HAL_PWREx_EnableUSBVoltageDetector(void)
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{
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/* Enable the USB voltage detector */
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SET_BIT(PWR->USBSCR, PWR_USBSCR_USB33DEN);
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}
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/**
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* @brief Disable the USB voltage level detector.
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* @retval None.
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*/
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void HAL_PWREx_DisableUSBVoltageDetector(void)
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{
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/* Disable the USB voltage detector */
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CLEAR_BIT(PWR->USBSCR, PWR_USBSCR_USB33DEN);
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}
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/**
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* @brief Enable VDDUSB supply.
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* @note Remove VDDUSB electrical and logical isolation, once VDDUSB supply
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* is present for consumption saving.
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* @retval None.
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*/
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void HAL_PWREx_EnableVddUSB(void)
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{
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SET_BIT(PWR->USBSCR, PWR_USBSCR_USB33SV);
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}
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/**
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* @brief Disable VDDUSB supply.
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* @retval None.
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*/
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void HAL_PWREx_DisableVddUSB(void)
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{
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CLEAR_BIT(PWR->USBSCR, PWR_USBSCR_USB33SV);
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}
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#endif /* PWR_USBSCR_USB33DEN */
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/**
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* @brief Enable the VBAT and temperature monitoring.
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* @retval None.
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*/
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void HAL_PWREx_EnableMonitoring(void)
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{
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SET_BIT(PWR->BDCR, PWR_BDCR_MONEN);
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}
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/**
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* @brief Disable the VBAT and temperature monitoring.
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* @retval None.
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*/
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void HAL_PWREx_DisableMonitoring(void)
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{
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CLEAR_BIT(PWR->BDCR, PWR_BDCR_MONEN);
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}
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#if defined (PWR_UCPDR_UCPD_STBY)
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/**
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* @brief Enable UCPD configuration memorization in Standby mode.
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* @retval None.
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*/
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void HAL_PWREx_EnableUCPDStandbyMode(void)
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{
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SET_BIT(PWR->UCPDR, PWR_UCPDR_UCPD_STBY);
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}
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/**
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* @brief Disable UCPD configuration memorization in Standby mode.
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* @note This function must be called on exiting the Standby mode and before
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* any UCPD configuration update.
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* @retval None.
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*/
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void HAL_PWREx_DisableUCPDStandbyMode(void)
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{
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CLEAR_BIT(PWR->UCPDR, PWR_UCPDR_UCPD_STBY);
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}
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#endif /* PWR_UCPDR_UCPD_STBY */
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#if defined (PWR_UCPDR_UCPD_DBDIS)
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/**
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* @brief Enable dead battery behavior.
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* @note After exiting reset, the USB Type-C (dead battery) behavior is
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* enabled, which may have a pull-down effect on CC1 and CC2 pins.
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* It is recommended to disable it in all cases, either to stop this
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* pull-down or to handover control to the UCPD (the UCPD must be
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* initialized before doing the disable).
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* @retval None.
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*/
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void HAL_PWREx_EnableUCPDDeadBattery(void)
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{
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CLEAR_BIT(PWR->UCPDR, PWR_UCPDR_UCPD_DBDIS);
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}
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/**
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* @brief Disable dead battery behavior.
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* @note After exiting reset, the USB Type-C (dead battery) behavior is
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* enabled, which may have a pull-down effect on CC1 and CC2 pins.
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* It is recommended to disable it in all cases, either to stop this
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* pull-down or to handover control to the UCPD (the UCPD must be
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* initialized before doing the disable).
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* @retval None.
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*/
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void HAL_PWREx_DisableUCPDDeadBattery(void)
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{
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SET_BIT(PWR->UCPDR, PWR_UCPDR_UCPD_DBDIS);
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}
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#endif /* PWR_UCPDR_UCPD_DBDIS */
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/**
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* @brief Enable the Battery charging.
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* @note When VDD is present, charge the external battery through an internal
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* resistor.
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* @param ResistorValue : Specifies the charging resistor.
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* This parameter can be one of the following values :
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* @arg PWR_BATTERY_CHARGING_RESISTOR_5 : 5 KOhm resistor.
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* @arg PWR_BATTERY_CHARGING_RESISTOR_1_5 : 1.5 KOhm resistor.
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* @retval None.
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*/
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void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorValue)
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{
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/* Check the parameter */
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assert_param(IS_PWR_BATTERY_RESISTOR_SELECT(ResistorValue));
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/* Specify the charging resistor */
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MODIFY_REG(PWR->BDCR, PWR_BDCR_VBRS, ResistorValue);
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/* Enable the Battery charging */
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SET_BIT(PWR->BDCR, PWR_BDCR_VBE);
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}
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/**
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* @brief Disable the Battery charging.
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* @retval None.
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*/
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void HAL_PWREx_DisableBatteryCharging(void)
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{
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CLEAR_BIT(PWR->BDCR, PWR_BDCR_VBE);
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}
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/**
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* @brief Enable the booster to guarantee the analog switch AC performance when
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* the VDD supply voltage is below 2V7.
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* @note The VDD supply voltage can be monitored through the PVD and the PLS
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* field bits.
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* @retval None.
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*/
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void HAL_PWREx_EnableAnalogBooster(void)
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{
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/* Enable the Analog voltage */
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SET_BIT(PWR->PMCR, PWR_PMCR_AVD_READY);
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/* Enable VDDA booster */
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SET_BIT(PWR->PMCR, PWR_PMCR_BOOSTE);
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}
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/**
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* @brief Disable the analog booster.
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* @retval None.
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*/
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void HAL_PWREx_DisableAnalogBooster(void)
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{
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/* Disable VDDA booster */
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CLEAR_BIT(PWR->PMCR, PWR_PMCR_BOOSTE);
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/* Disable the Analog voltage */
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CLEAR_BIT(PWR->PMCR, PWR_PMCR_AVD_READY);
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}
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/**
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* @brief This function handles the PWR PVD/AVD interrupt request.
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* @note This API should be called under the PVD_AVD_IRQHandler().
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* @note The use of this API is when the PVD and AVD are activated at the same time.
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* @retval None
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*/
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void HAL_PWREx_PVD_AVD_IRQHandler(void)
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{
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/* Check PWR PVD AVD EXTI Rising flag */
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if (__HAL_PWR_PVD_AVD_EXTI_GET_RISING_FLAG() != 0U)
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{
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/* Clear PWR PVD AVD EXTI Rising pending bit */
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WRITE_REG(EXTI->RPR1, PWR_EXTI_LINE_AVD);
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/* PWR PVD AVD Rising interrupt user callback */
|
|
HAL_PWREx_PVD_AVD_Rising_Callback();
|
|
}
|
|
|
|
/* Check PWR PVD AVD EXTI Falling flag */
|
|
if (__HAL_PWR_PVD_AVD_EXTI_GET_FALLING_FLAG() != 0U)
|
|
{
|
|
/* Clear PWR PVD AVD EXTI Falling pending bit */
|
|
WRITE_REG(EXTI->FPR1, PWR_EXTI_LINE_AVD);
|
|
|
|
/* PWR PVD AVD Falling interrupt user callback */
|
|
HAL_PWREx_PVD_AVD_Falling_Callback();
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief PWR PVD AVD Rising interrupt callback.
|
|
* @retval None.
|
|
*/
|
|
__weak void HAL_PWREx_PVD_AVD_Rising_Callback(void)
|
|
{
|
|
/* NOTE : This function should not be modified, when the callback is needed,
|
|
the HAL_PWR_AVDCallback can be implemented in the user file
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @brief PWR PVD AVD Falling interrupt callback.
|
|
* @retval None.
|
|
*/
|
|
__weak void HAL_PWREx_PVD_AVD_Falling_Callback(void)
|
|
{
|
|
/* NOTE : This function should not be modified, when the callback is needed,
|
|
the HAL_PWR_AVDCallback can be implemented in the user file
|
|
*/
|
|
}
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup PWREx_Exported_Functions_Group3 Wakeup Pins configuration Functions
|
|
* @brief Wakeup Pins configuration functions
|
|
*
|
|
@verbatim
|
|
===============================================================================
|
|
##### Wakeup Pins configuration Functions #####
|
|
===============================================================================
|
|
[..]
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Enable the Wake-up PINx functionality.
|
|
* @param sPinParams : Pointer to a PWREx_WakeupPinTypeDef structure that
|
|
* contains the configuration information for the wake-up
|
|
* Pin.
|
|
* @retval None.
|
|
*/
|
|
void HAL_PWREx_EnableWakeUpPin(const PWREx_WakeupPinTypeDef *sPinParams)
|
|
{
|
|
uint32_t pinConfig;
|
|
uint32_t regMask;
|
|
const uint32_t pullMask = PWR_WUCR_WUPPUPD1;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_PWR_WAKEUP_PIN(sPinParams->WakeUpPin));
|
|
assert_param(IS_PWR_WAKEUP_PIN_POLARITY(sPinParams->PinPolarity));
|
|
assert_param(IS_PWR_WAKEUP_PIN_PULL(sPinParams->PinPull));
|
|
|
|
pinConfig = sPinParams->WakeUpPin | \
|
|
(sPinParams->PinPolarity << ((POSITION_VAL(sPinParams->WakeUpPin) + PWR_WUCR_WUPP1_Pos) & 0x1FU)) | \
|
|
(sPinParams->PinPull << (((POSITION_VAL(sPinParams->WakeUpPin) * PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET) \
|
|
+ PWR_WUCR_WUPPUPD1_Pos) & 0x1FU));
|
|
|
|
regMask = sPinParams->WakeUpPin | \
|
|
(PWR_WUCR_WUPP1 << (POSITION_VAL(sPinParams->WakeUpPin) & 0x1FU)) | \
|
|
(pullMask << ((POSITION_VAL(sPinParams->WakeUpPin) * PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET) & 0x1FU));
|
|
|
|
/* Enable and Specify the Wake-Up pin polarity and the pull configuration
|
|
for the event detection (rising or falling edge) */
|
|
MODIFY_REG(PWR->WUCR, regMask, pinConfig);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable the Wake-up PINx functionality.
|
|
* @param WakeUpPinx : Specifies the Wake-Up pin to be disabled.
|
|
* This parameter can be one of the following values:
|
|
* @arg PWR_WAKEUP_PIN1
|
|
* @arg PWR_WAKEUP_PIN2
|
|
* @arg PWR_WAKEUP_PIN3
|
|
* @arg PWR_WAKEUP_PIN4
|
|
* @arg PWR_WAKEUP_PIN5
|
|
* @arg PWR_WAKEUP_PIN6
|
|
* @arg PWR_WAKEUP_PIN7
|
|
* @arg PWR_WAKEUP_PIN8
|
|
* @note The PWR_WAKEUP_PIN6, PWR_WAKEUP_PIN7 and PWR_WAKEUP_PIN8 are not available for
|
|
* STM32H503xx devices.
|
|
* @retval None
|
|
*/
|
|
void HAL_PWREx_DisableWakeUpPin(uint32_t WakeUpPinx)
|
|
{
|
|
/* Check the parameter */
|
|
assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
|
|
|
|
/* Disable the WakeUpPin */
|
|
CLEAR_BIT(PWR->WUCR, (PWR_WUCR_WUPEN & WakeUpPinx));
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup PWREx_Exported_Functions_Group4 Memories Retention Functions
|
|
* @brief Memories retention functions
|
|
*
|
|
@verbatim
|
|
===============================================================================
|
|
##### Memories Retention Functions #####
|
|
===============================================================================
|
|
[..]
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Enable the Flash Power Down in Stop mode.
|
|
* @note When Flash Power Down is enabled the Flash memory enters low-power
|
|
* mode. This feature allows to
|
|
* obtain the best trade-off between low-power consumption and restart
|
|
* time when exiting from Stop mode.
|
|
* @retval None.
|
|
*/
|
|
void HAL_PWREx_EnableFlashPowerDown(void)
|
|
{
|
|
/* Enable the Flash Power Down */
|
|
SET_BIT(PWR->PMCR, PWR_PMCR_FLPS);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable the Flash Power Down in Stop mode.
|
|
* @note When Flash Power Down is disabled the Flash memory is kept on
|
|
* normal mode. This feature allows
|
|
* to obtain the best trade-off between low-power consumption and
|
|
* restart time when exiting from Stop mode.
|
|
* @retval None.
|
|
*/
|
|
void HAL_PWREx_DisableFlashPowerDown(void)
|
|
{
|
|
/* Disable the Flash Power Down */
|
|
CLEAR_BIT(PWR->PMCR, PWR_PMCR_FLPS);
|
|
}
|
|
|
|
/**
|
|
* @brief Enable memory block shut-off in Stop mode
|
|
* @note In Stop mode, the content of the memory blocks is
|
|
* maintained. Further power optimization can be obtained by switching
|
|
* off some memory blocks. This optimization implies loss of the memory
|
|
* content. The user can select which memory is discarded during STOP
|
|
* mode by means of xxSO bits.
|
|
* @param MemoryBlock : Specifies the memory block to shut-off during Stop mode.
|
|
* This parameter can be one of the following values for STM32H573xx/STM32H563xx/STM32H562xx :
|
|
* @arg PWR_ETHERNET_MEMORY_BLOCK PWR_PMCR_ETHERNETSO : Ethernet shut-off control in Stop mode
|
|
* @arg PWR_RAM3_MEMORY_BLOCK PWR_PMCR_SRAM3SO : RAM3 shut-off control in Stop mode
|
|
* @arg PWR_RAM2_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16SO : RAM2 16k byte shut-off control in Stop mode
|
|
* @arg PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO : RAM2 48k byte shut-off control in Stop mode
|
|
* @arg PWR_RAM1_MEMORY_BLOCK PWR_PMCR_SRAM1SO : RAM1 shut-off control in Stop mode
|
|
* This parameter can be one of the following values for STM32H533xx/STM32H523xx :
|
|
* @arg PWR_RAM3_MEMORY_BLOCK PWR_PMCR_SRAM3SO : RAM3 shut-off control in Stop mode
|
|
* @arg PWR_RAM2_LOW_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16LSO : RAM2 Low 16k byte shut-off control
|
|
* in Stop mode
|
|
* @arg PWR_RAM2_HIGH_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16HSO : RAM2 High 16k byte shut-off control
|
|
* in Stop mode
|
|
* @arg PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO : RAM2 48k byte shut-off control in Stop mode
|
|
* @arg PWR_RAM1_MEMORY_BLOCK PWR_PMCR_SRAM1SO : RAM1 shut-off control in Stop mode
|
|
* This parameter can be one of the following values for STM32H503xx :
|
|
* @arg PWR_RAM2_MEMORY_BLOCK PWR_PMCR_SRAM2SO : RAM2 shut-off control in Stop mode
|
|
* @arg PWR_RAM1_MEMORY_BLOCK PWR_PMCR_SRAM1SO : RAM1 shut-off control in Stop mode
|
|
* @retval None.
|
|
*/
|
|
void HAL_PWREx_EnableMemoryShutOff(uint32_t MemoryBlock)
|
|
{
|
|
/* Check the parameter */
|
|
assert_param(IS_PWR_MEMORY_BLOCK(MemoryBlock));
|
|
|
|
/* Enable memory block shut-off */
|
|
SET_BIT(PWR->PMCR, MemoryBlock);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable memory block shut-off in Stop mode
|
|
* @param MemoryBlock : Specifies the memory block to keep content during
|
|
* Stop mode.
|
|
* This parameter can be one of the following values for STM32H573xx/STM32H563xx/STM32H562xx :
|
|
* @arg PWR_ETHERNET_MEMORY_BLOCK PWR_PMCR_ETHERNETSO : Ethernet shut-off control in Stop mode
|
|
* @arg PWR_RAM3_MEMORY_BLOCK PWR_PMCR_SRAM3SO : RAM3 shut-off control in Stop mode
|
|
* @arg PWR_RAM2_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16SO : RAM2 16k byte shut-off control in Stop mode
|
|
* @arg PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO : RAM2 48k byte shut-off control in Stop mode
|
|
* @arg PWR_RAM1_MEMORY_BLOCK PWR_PMCR_SRAM1SO : RAM1 shut-off control in Stop mode
|
|
* This parameter can be one of the following values for STM32H533xx/STM32H523xx :
|
|
* @arg PWR_RAM3_MEMORY_BLOCK PWR_PMCR_SRAM3SO : RAM3 shut-off control in Stop mode
|
|
* @arg PWR_RAM2_LOW_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16LSO : RAM2 Low 16k byte shut-off control
|
|
* in Stop mode
|
|
* @arg PWR_RAM2_HIGH_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16HSO : RAM2 High 16k byte shut-off control
|
|
* in Stop mode
|
|
* @arg PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO : RAM2 48k byte shut-off control in Stop mode
|
|
* @arg PWR_RAM1_MEMORY_BLOCK PWR_PMCR_SRAM1SO : RAM1 shut-off control in Stop mode
|
|
* This parameter can be one of the following values for STM32H503xx :
|
|
* @arg PWR_RAM2_MEMORY_BLOCK PWR_PMCR_SRAM2SO : RAM2 shut-off control in Stop mode
|
|
* @arg PWR_RAM1_MEMORY_BLOCK PWR_PMCR_SRAM1SO : RAM1 shut-off control in Stop mode
|
|
* @retval None.
|
|
*/
|
|
void HAL_PWREx_DisableMemoryShutOff(uint32_t MemoryBlock)
|
|
{
|
|
/* Check the parameter */
|
|
assert_param(IS_PWR_MEMORY_BLOCK(MemoryBlock));
|
|
|
|
/* Disable memory block shut-off */
|
|
CLEAR_BIT(PWR->PMCR, MemoryBlock);
|
|
}
|
|
|
|
/**
|
|
* @brief Enable the Backup RAM retention in Standby and VBAT modes.
|
|
* @note If BREN is reset, the backup RAM can still be used in Run, Sleep and
|
|
* Stop modes. However, its content is lost in Standby, Shutdown and
|
|
* VBAT modes. This bit can be writte
|
|
* @retval None.
|
|
*/
|
|
HAL_StatusTypeDef HAL_PWREx_EnableBkupRAMRetention(void)
|
|
{
|
|
SET_BIT(PWR->BDCR, PWR_BDCR_BREN);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Disable the Backup RAM retention in Standby and VBAT modes.
|
|
* @note If BREN is reset, the backup RAM can still be used in Run, Sleep and
|
|
* Stop modes. However, its content is lost in Standby, Shutdown and
|
|
* VBAT modes. This bit can be write
|
|
* @retval None.
|
|
*/
|
|
void HAL_PWREx_DisableBkupRAMRetention(void)
|
|
{
|
|
CLEAR_BIT(PWR->BDCR, PWR_BDCR_BREN);
|
|
}
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup PWREx_Exported_Functions_Group5 IO and JTAG Retention Functions
|
|
* @brief IO and JTAG Retention functions
|
|
*
|
|
@verbatim
|
|
===============================================================================
|
|
##### IO and JTAG Retention Functions #####
|
|
===============================================================================
|
|
[..]
|
|
In the Standby mode, the I/Os are by default in floating state. If the IORETEN bit in the
|
|
PWR_IORETR register is set, the I/Os output state is retained. IO Retention mode is
|
|
enabled for all IO except the IO support the standby functionality and JTAG IOs (PA13,
|
|
PA14, PA15 and PB4). When entering into Standby mode, the state of the output is
|
|
sampled, and pull-up or pull-down resistor are set to maintain the IO output during Standby
|
|
mode.
|
|
If the JTAGIORETEN bit in the PWR_IORETR register is set, the I/Os output state is
|
|
retained. IO Retention mode is enabled for PA13, PA14, PA15 and PB4 (default JTAG pullup/
|
|
pull-down after wakeup are not enabled).
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Enable GPIO state retention in Standby mode.
|
|
* @note When entering into standby mode, the output is sampled, and applied to the output IO during
|
|
* the standby power mode
|
|
* @retval None.
|
|
*/
|
|
void HAL_PWREx_EnableStandbyIORetention(void)
|
|
{
|
|
/* Enable GPIO state retention */
|
|
SET_BIT(PWR->IORETR, PWR_IORETR_IORETEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable GPIO state retention in Standby mode.
|
|
* @retval None.
|
|
*/
|
|
void HAL_PWREx_DisableStandbyIORetention(void)
|
|
{
|
|
/* Disable GPIO state retention */
|
|
CLEAR_BIT(PWR->IORETR, PWR_IORETR_IORETEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Enable JTAG IOs state retention in Standby mode.
|
|
* @note when entering into standby mode, the output is sampled, and applied to the output IO during
|
|
* the standby power mode
|
|
* @retval None.
|
|
*/
|
|
void HAL_PWREx_EnableStandbyJTAGIORetention(void)
|
|
{
|
|
/* Enable JTAG IOs state retention */
|
|
SET_BIT(PWR->IORETR, PWR_IORETR_JTAGIORETEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable JTAG IOs state retention in Standby mode.
|
|
* @retval None.
|
|
*/
|
|
void HAL_PWREx_DisableStandbyJTAGIORetention(void)
|
|
{
|
|
/* Enable JTAG IOs state retention */
|
|
CLEAR_BIT(PWR->IORETR, PWR_IORETR_JTAGIORETEN);
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
#endif /* defined (HAL_PWR_MODULE_ENABLED) */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|