Merge branch 'madao'

into madao # Please enter a commit message to explain why this merge is
necessary,

AZURE_RTOS/App/app_azure_rtos.c

@@ -22,7 +22,7 @@
 #include "app_azure_rtos.h"
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
-
+#include "headfile.h"
 /* USER CODE END Includes */
 
 /* Private typedef -----------------------------------------------------------*/
@@ -95,11 +95,12 @@ VOID tx_application_define(VOID *first_unused_memory)
       /* USER CODE BEGIN  App_ThreadX_Init_Error */
       while(1)
       {
+		  
       }
       /* USER CODE END  App_ThreadX_Init_Error */
     }
     /* USER CODE BEGIN  App_ThreadX_Init_Success */
-
+//	App_ThreadX_Init(first_unused_memory);  //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> //app_thread_init()<29>ſ<EFBFBD><C5BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
     /* USER CODE END  App_ThreadX_Init_Success */
 
   }

AutoGuideStick.ioc

@@ -1,10 +1,27 @@
 #MicroXplorer Configuration settings - do not modify
+BOOTPATH.BootPathName=LEGACY
+BOOTPATH.IPParameters=BootPathName
+BOOTPATH.UserSelectedBootPath=LEGACY
 CAD.formats=
 CAD.pinconfig=
 CAD.provider=
 CORTEX_M33_NS.userName=CORTEX_M33
 File.Version=6
-GPIO.groupedBy=
+GPDMA1.CIRCULARMODE_GPDMACH3=ENABLE
+GPDMA1.CIRCULARMODE_GPDMACH5=ENABLE
+GPDMA1.DIRECTION_GPDMACH4=DMA_MEMORY_TO_PERIPH
+GPDMA1.IPHANDLE_GPDMACH3-SIMPLEREQUEST_GPDMACH3=__NULL
+GPDMA1.IPHANDLE_GPDMACH4-SIMPLEREQUEST_GPDMACH4=__NULL
+GPDMA1.IPHANDLE_GPDMACH5-SIMPLEREQUEST_GPDMACH5=__NULL
+GPDMA1.IPParameters=REQUEST_GPDMACH4,DIRECTION_GPDMACH4,SRCINC_GPDMACH4,CIRCULARMODE_GPDMACH5,LINKALLOCATEDPORT_CIRCULAR_GPDMACH5,REQUEST_GPDMACH5,TRANSFERALLOCATEDPORTSRC_GPDMACH5,TRANSFERALLOCATEDPORTDEST_GPDMACH5,IPHANDLE_GPDMACH5-SIMPLEREQUEST_GPDMACH5,IPHANDLE_GPDMACH4-SIMPLEREQUEST_GPDMACH4,CIRCULARMODE_GPDMACH3,IPHANDLE_GPDMACH3-SIMPLEREQUEST_GPDMACH3,REQUEST_GPDMACH3
+GPDMA1.LINKALLOCATEDPORT_CIRCULAR_GPDMACH5=DMA_LINK_ALLOCATED_PORT1
+GPDMA1.REQUEST_GPDMACH3=GPDMA1_REQUEST_USART2_RX
+GPDMA1.REQUEST_GPDMACH4=GPDMA1_REQUEST_UART4_TX
+GPDMA1.REQUEST_GPDMACH5=GPDMA1_REQUEST_UART4_RX
+GPDMA1.SRCINC_GPDMACH4=DMA_SINC_INCREMENTED
+GPDMA1.TRANSFERALLOCATEDPORTDEST_GPDMACH5=DMA_DEST_ALLOCATED_PORT1
+GPDMA1.TRANSFERALLOCATEDPORTSRC_GPDMACH5=DMA_SRC_ALLOCATED_PORT1
+GPIO.groupedBy=Group By Peripherals
 KeepUserPlacement=false
 MMTAppRegionsCount=0
 MMTConfigApplied=false
@@ -13,38 +30,76 @@ Mcu.ContextProject=TrustZoneDisabled
 Mcu.Family=STM32H5
 Mcu.IP0=BOOTPATH
 Mcu.IP1=CORTEX_M33_NS
+Mcu.IP10=TIM1
+Mcu.IP11=TIM2
+Mcu.IP12=TIM3
+Mcu.IP13=TIM4
+Mcu.IP14=TIM5
+Mcu.IP15=TIM8
+Mcu.IP16=UART4
+Mcu.IP17=USART2
+Mcu.IP18=USART3
 Mcu.IP2=DEBUG
-Mcu.IP3=ICACHE
+Mcu.IP3=GPDMA1
 Mcu.IP4=MEMORYMAP
 Mcu.IP5=NVIC
 Mcu.IP6=PWR
 Mcu.IP7=RCC
 Mcu.IP8=SYS
 Mcu.IP9=THREADX
-Mcu.IPNb=10
+Mcu.IPNb=19
 Mcu.Name=STM32H563ZITx
 Mcu.Package=LQFP144
 Mcu.Pin0=PH0-OSC_IN(PH0)
 Mcu.Pin1=PH1-OSC_OUT(PH1)
-Mcu.Pin10=VP_BOOTPATH_VS_BOOTPATH
-Mcu.Pin11=VP_MEMORYMAP_VS_MEMORYMAP
-Mcu.Pin2=PA13(JTMS/SWDIO)
-Mcu.Pin3=PA14(JTCK/SWCLK)
-Mcu.Pin4=VP_CORTEX_M33_NS_VS_Hclk
-Mcu.Pin5=VP_ICACHE_VS_ICACHE
-Mcu.Pin6=VP_PWR_VS_SECSignals
-Mcu.Pin7=VP_PWR_VS_LPOM
-Mcu.Pin8=VP_SYS_VS_tim1
-Mcu.Pin9=VP_THREADX_VS_RTOSJjThreadXJjCoreJjDefault
-Mcu.PinsNb=12
+Mcu.Pin10=PG2
+Mcu.Pin11=PG3
+Mcu.Pin12=PC6
+Mcu.Pin13=PC7
+Mcu.Pin14=PC9
+Mcu.Pin15=PA13(JTMS/SWDIO)
+Mcu.Pin16=PA14(JTCK/SWCLK)
+Mcu.Pin17=PC11
+Mcu.Pin18=PC12
+Mcu.Pin19=PD2
+Mcu.Pin2=PC2
+Mcu.Pin20=PD5
+Mcu.Pin21=PD6
+Mcu.Pin22=PB8
+Mcu.Pin23=PB9
+Mcu.Pin24=VP_CORTEX_M33_NS_VS_Hclk
+Mcu.Pin25=VP_GPDMA1_VS_GPDMACH3
+Mcu.Pin26=VP_GPDMA1_VS_GPDMACH4
+Mcu.Pin27=VP_GPDMA1_VS_GPDMACH5
+Mcu.Pin28=VP_PWR_VS_SECSignals
+Mcu.Pin29=VP_PWR_VS_LPOM
+Mcu.Pin3=PA0
+Mcu.Pin30=VP_SYS_VS_tim6
+Mcu.Pin31=VP_THREADX_VS_RTOSJjThreadXJjCoreJjDefault
+Mcu.Pin32=VP_TIM2_VS_ClockSourceINT
+Mcu.Pin33=VP_TIM3_VS_ClockSourceINT
+Mcu.Pin34=VP_TIM4_VS_ClockSourceINT
+Mcu.Pin35=VP_TIM5_VS_ClockSourceINT
+Mcu.Pin36=VP_BOOTPATH_VS_BOOTPATH
+Mcu.Pin37=VP_MEMORYMAP_VS_MEMORYMAP
+Mcu.Pin4=PB1
+Mcu.Pin5=PG0
+Mcu.Pin6=PG1
+Mcu.Pin7=PE9
+Mcu.Pin8=PE11
+Mcu.Pin9=PB10
+Mcu.PinsNb=38
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32H563ZITx
-MxCube.Version=6.14.0
-MxDb.Version=DB.6.0.140
+MxCube.Version=6.14.1
+MxDb.Version=DB.6.0.141
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.ForceEnableDMAVector=true
+NVIC.GPDMA1_Channel3_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.GPDMA1_Channel4_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.GPDMA1_Channel5_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
@@ -55,14 +110,100 @@ NVIC.SavedPendsvIrqHandlerGenerated=true
 NVIC.SavedSvcallIrqHandlerGenerated=true
 NVIC.SavedSystickIrqHandlerGenerated=true
 NVIC.SysTick_IRQn=true\:14\:0\:false\:false\:false\:false\:false\:true\:false
-NVIC.TIM1_UP_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true
-NVIC.TimeBase=TIM1_UP_IRQn
-NVIC.TimeBaseIP=TIM1
+NVIC.TIM2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TIM3_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TIM5_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TIM6_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true
+NVIC.TimeBase=TIM6_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UART4_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.USART3_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PA0.GPIOParameters=GPIO_Label
+PA0.GPIO_Label=HC_Echo
+PA0.Signal=S_TIM5_CH1
 PA13(JTMS/SWDIO).Mode=Serial_Wire
 PA13(JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
 PA14(JTCK/SWCLK).Mode=Serial_Wire
 PA14(JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
+PB1.GPIOParameters=GPIO_Label
+PB1.GPIO_Label=PWMB
+PB1.Locked=true
+PB1.Signal=S_TIM3_CH4
+PB10.Locked=true
+PB10.Mode=Asynchronous
+PB10.Signal=USART3_TX
+PB8.Locked=true
+PB8.Mode=Asynchronous
+PB8.Signal=UART4_RX
+PB9.Locked=true
+PB9.Mode=Asynchronous
+PB9.Signal=UART4_TX
+PC11.Locked=true
+PC11.Mode=Asynchronous
+PC11.Signal=USART3_RX
+PC12.GPIOParameters=GPIO_PuPd,GPIO_Label
+PC12.GPIO_Label=Shake_Motor
+PC12.GPIO_PuPd=GPIO_PULLDOWN
+PC12.Locked=true
+PC12.Signal=GPIO_Output
+PC2.GPIOParameters=GPIO_Label
+PC2.GPIO_Label=PWMA
+PC2.Locked=true
+PC2.Signal=S_TIM4_CH4
+PC6.GPIOParameters=GPIO_PuPd,GPIO_Label
+PC6.GPIO_Label=E2A
+PC6.GPIO_PuPd=GPIO_PULLUP
+PC6.Locked=true
+PC6.Signal=S_TIM8_CH1
+PC7.GPIOParameters=GPIO_PuPd,GPIO_Label
+PC7.GPIO_Label=E2B
+PC7.GPIO_PuPd=GPIO_PULLUP
+PC7.Locked=true
+PC7.Signal=S_TIM8_CH2
+PC9.GPIOParameters=GPIO_PuPd,GPIO_Label
+PC9.GPIO_Label=HC_Trig
+PC9.GPIO_PuPd=GPIO_NOPULL
+PC9.Locked=true
+PC9.Signal=GPIO_Output
+PD2.GPIOParameters=GPIO_PuPd,GPIO_Label
+PD2.GPIO_Label=Buzzer
+PD2.GPIO_PuPd=GPIO_PULLDOWN
+PD2.Locked=true
+PD2.Signal=GPIO_Output
+PD5.Locked=true
+PD5.Mode=Asynchronous
+PD5.Signal=USART2_TX
+PD6.Locked=true
+PD6.Mode=Asynchronous
+PD6.Signal=USART2_RX
+PE11.GPIOParameters=GPIO_PuPd,GPIO_Label
+PE11.GPIO_Label=E1B
+PE11.GPIO_PuPd=GPIO_PULLUP
+PE11.Locked=true
+PE11.Signal=S_TIM1_CH2
+PE9.GPIOParameters=GPIO_PuPd,GPIO_Label
+PE9.GPIO_Label=E1A
+PE9.GPIO_PuPd=GPIO_PULLUP
+PE9.Locked=true
+PE9.Signal=S_TIM1_CH1
+PG0.GPIOParameters=GPIO_Label
+PG0.GPIO_Label=AIN1
+PG0.Locked=true
+PG0.Signal=GPIO_Output
+PG1.GPIOParameters=GPIO_Label
+PG1.GPIO_Label=AIN2
+PG1.Locked=true
+PG1.Signal=GPIO_Output
+PG2.GPIOParameters=GPIO_Label
+PG2.GPIO_Label=BIN1
+PG2.Locked=true
+PG2.Signal=GPIO_Output
+PG3.GPIOParameters=GPIO_Label
+PG3.GPIO_Label=BIN2
+PG3.Locked=true
+PG3.Signal=GPIO_Output
 PH0-OSC_IN(PH0).Mode=HSE-External-Oscillator
 PH0-OSC_IN(PH0).Signal=RCC_OSC_IN
 PH1-OSC_OUT(PH1).Mode=HSE-External-Oscillator
@@ -99,7 +240,7 @@ ProjectManager.ToolChainLocation=
 ProjectManager.UAScriptAfterPath=
 ProjectManager.UAScriptBeforePath=
 ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ICACHE_Init-ICACHE-false-HAL-true,0-MX_CORTEX_M33_NS_Init-CORTEX_M33_NS-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_GPDMA1_Init-GPDMA1-false-HAL-true,4-MX_USART2_UART_Init-USART2-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true,6-MX_TIM3_Init-TIM3-false-HAL-true,7-MX_USART3_UART_Init-USART3-false-HAL-true,8-MX_TIM4_Init-TIM4-false-HAL-true,9-MX_UART4_Init-UART4-false-HAL-true,10-MX_TIM1_Init-TIM1-false-HAL-true,11-MX_TIM8_Init-TIM8-false-HAL-true,0-MX_CORTEX_M33_NS_Init-CORTEX_M33_NS-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
 RCC.ADCFreq_Value=250000000
 RCC.AHBFreq_Value=250000000
 RCC.APB1Freq_Value=250000000
@@ -185,20 +326,74 @@ RCC.VCOInputFreq_Value=4000000
 RCC.VCOOutputFreq_Value=500000000
 RCC.VCOPLL2OutputFreq_Value=516000000
 RCC.VCOPLL3OutputFreq_Value=516000000
+SH.S_TIM1_CH1.0=TIM1_CH1,Encoder_Interface
+SH.S_TIM1_CH1.ConfNb=1
+SH.S_TIM1_CH2.0=TIM1_CH2,Encoder_Interface
+SH.S_TIM1_CH2.ConfNb=1
+SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4
+SH.S_TIM3_CH4.ConfNb=1
+SH.S_TIM4_CH4.0=TIM4_CH4,PWM Generation4 CH4
+SH.S_TIM4_CH4.ConfNb=1
+SH.S_TIM5_CH1.0=TIM5_CH1,Input_Capture1_from_TI1
+SH.S_TIM5_CH1.ConfNb=1
+SH.S_TIM8_CH1.0=TIM8_CH1,Encoder_Interface
+SH.S_TIM8_CH1.ConfNb=1
+SH.S_TIM8_CH2.0=TIM8_CH2,Encoder_Interface
+SH.S_TIM8_CH2.ConfNb=1
+THREADX.IPParameters=TX_APP_GENERATE_INIT_CODE,TX_MINIMUM_STACK
+THREADX.TX_APP_GENERATE_INIT_CODE=false
+THREADX.TX_MINIMUM_STACK=400
+TIM1.EncoderMode=TIM_ENCODERMODE_TI12
+TIM1.IPParameters=EncoderMode
+TIM2.IPParameters=Prescaler
+TIM2.Prescaler=250 - 1
+TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
+TIM3.IPParameters=Prescaler,Channel-PWM Generation4 CH4,PeriodNoDither
+TIM3.PeriodNoDither=255
+TIM3.Prescaler=48
+TIM4.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
+TIM4.IPParameters=Channel-PWM Generation4 CH4,Prescaler,PeriodNoDither
+TIM4.PeriodNoDither=255
+TIM4.Prescaler=48
+TIM5.Channel-Input_Capture1_from_TI1=TIM_CHANNEL_1
+TIM5.IPParameters=Channel-Input_Capture1_from_TI1,Prescaler
+TIM5.Prescaler=250-1
+TIM8.EncoderMode=TIM_ENCODERMODE_TI12
+TIM8.IPParameters=EncoderMode
+UART4.BaudRate=9600
+UART4.IPParameters=BaudRate
+USART2.BaudRate=9600
+USART2.IPParameters=VirtualMode-Asynchronous,BaudRate
+USART2.VirtualMode-Asynchronous=VM_ASYNC
+USART3.BaudRate=115200
+USART3.IPParameters=VirtualMode-Asynchronous,BaudRate
+USART3.VirtualMode-Asynchronous=VM_ASYNC
 VP_BOOTPATH_VS_BOOTPATH.Mode=BP_Activate
 VP_BOOTPATH_VS_BOOTPATH.Signal=BOOTPATH_VS_BOOTPATH
 VP_CORTEX_M33_NS_VS_Hclk.Mode=Hclk_Mode
 VP_CORTEX_M33_NS_VS_Hclk.Signal=CORTEX_M33_NS_VS_Hclk
-VP_ICACHE_VS_ICACHE.Mode=DirectMappedCache
-VP_ICACHE_VS_ICACHE.Signal=ICACHE_VS_ICACHE
+VP_GPDMA1_VS_GPDMACH3.Mode=SIMPLEREQUEST_GPDMACH3
+VP_GPDMA1_VS_GPDMACH3.Signal=GPDMA1_VS_GPDMACH3
+VP_GPDMA1_VS_GPDMACH4.Mode=SIMPLEREQUEST_GPDMACH4
+VP_GPDMA1_VS_GPDMACH4.Signal=GPDMA1_VS_GPDMACH4
+VP_GPDMA1_VS_GPDMACH5.Mode=SIMPLEREQUEST_GPDMACH5
+VP_GPDMA1_VS_GPDMACH5.Signal=GPDMA1_VS_GPDMACH5
 VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg
 VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
 VP_PWR_VS_LPOM.Mode=PowerOptimisation
 VP_PWR_VS_LPOM.Signal=PWR_VS_LPOM
 VP_PWR_VS_SECSignals.Mode=Security/Privilege
 VP_PWR_VS_SECSignals.Signal=PWR_VS_SECSignals
-VP_SYS_VS_tim1.Mode=TIM1
-VP_SYS_VS_tim1.Signal=SYS_VS_tim1
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
 VP_THREADX_VS_RTOSJjThreadXJjCoreJjDefault.Mode=Core_Default
 VP_THREADX_VS_RTOSJjThreadXJjCoreJjDefault.Signal=THREADX_VS_RTOSJjThreadXJjCoreJjDefault
+VP_TIM2_VS_ClockSourceINT.Mode=Internal
+VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
+VP_TIM3_VS_ClockSourceINT.Mode=Internal
+VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT
+VP_TIM4_VS_ClockSourceINT.Mode=Internal
+VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT
+VP_TIM5_VS_ClockSourceINT.Mode=Internal
+VP_TIM5_VS_ClockSourceINT.Signal=TIM5_VS_ClockSourceINT
 board=custom

Core/Inc/app_threadx.h

@@ -30,12 +30,13 @@ extern "C" {
 
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
-
+#include "headfile.h"
 /* USER CODE END Includes */
 
 /* Exported types ------------------------------------------------------------*/
 /* USER CODE BEGIN ET */
 
+//extern MotorCommand current_motor_cmd;
 /* USER CODE END ET */
 
 /* Exported constants --------------------------------------------------------*/
@@ -46,6 +47,23 @@ extern "C" {
 /* Private defines -----------------------------------------------------------*/
 
 /* USER CODE BEGIN PD */
+// <20>¼<EFBFBD><C2BC><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>
+#define EVENT_OBSTACLE_DETECTED    0x01
+#define EVENT_BLE_COMMAND_RECEIVED 0x04
+#define IMU_UPDATE_EVENT           0x08
+#define EVENT_LOCATION_UPDATED     0x10
+
+
+#define TEST 			1
+extern TX_QUEUE ble_tx_queue;
+extern TX_EVENT_FLAGS_GROUP system_events;
+extern TX_EVENT_FLAGS_GROUP sensor_events; //传感器事件组
+extern TX_EVENT_FLAGS_GROUP response_events; //避障
+//typedef struct
+//{
+////	uint32_t msg_type;  // 应该使用 int --- 4字节
+//	char data[128];
+//}BLE_Message;  // 
 
 /* USER CODE END PD */
 

Core/Inc/gpdma.h

@@ -1,9 +1,9 @@
 /* USER CODE BEGIN Header */
 /**
   ******************************************************************************
-  * @file    icache.h
+  * @file    gpdma.h
   * @brief   This file contains all the function prototypes for
-  *          the icache.c file
+  *          the gpdma.c file
   ******************************************************************************
   * @attention
   *
@@ -18,8 +18,8 @@
   */
 /* USER CODE END Header */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __ICACHE_H__
-#define __ICACHE_H__
+#ifndef __GPDMA_H__
+#define __GPDMA_H__
 
 #ifdef __cplusplus
 extern "C" {
@@ -36,7 +36,7 @@ extern "C" {
 
 /* USER CODE END Private defines */
 
-void MX_ICACHE_Init(void);
+void MX_GPDMA1_Init(void);
 
 /* USER CODE BEGIN Prototypes */
 
@@ -46,5 +46,5 @@ void MX_ICACHE_Init(void);
 }
 #endif
 
-#endif /* __ICACHE_H__ */
+#endif /* __GPDMA_H__ */
 

Core/Inc/main.h

@@ -57,6 +57,34 @@ void Error_Handler(void);
 /* USER CODE END EFP */
 
 /* Private defines -----------------------------------------------------------*/
+#define PWMA_Pin GPIO_PIN_2
+#define PWMA_GPIO_Port GPIOC
+#define HC_Echo_Pin GPIO_PIN_0
+#define HC_Echo_GPIO_Port GPIOA
+#define PWMB_Pin GPIO_PIN_1
+#define PWMB_GPIO_Port GPIOB
+#define AIN1_Pin GPIO_PIN_0
+#define AIN1_GPIO_Port GPIOG
+#define AIN2_Pin GPIO_PIN_1
+#define AIN2_GPIO_Port GPIOG
+#define E1A_Pin GPIO_PIN_9
+#define E1A_GPIO_Port GPIOE
+#define E1B_Pin GPIO_PIN_11
+#define E1B_GPIO_Port GPIOE
+#define BIN1_Pin GPIO_PIN_2
+#define BIN1_GPIO_Port GPIOG
+#define BIN2_Pin GPIO_PIN_3
+#define BIN2_GPIO_Port GPIOG
+#define E2A_Pin GPIO_PIN_6
+#define E2A_GPIO_Port GPIOC
+#define E2B_Pin GPIO_PIN_7
+#define E2B_GPIO_Port GPIOC
+#define HC_Trig_Pin GPIO_PIN_9
+#define HC_Trig_GPIO_Port GPIOC
+#define Shake_Motor_Pin GPIO_PIN_12
+#define Shake_Motor_GPIO_Port GPIOC
+#define Buzzer_Pin GPIO_PIN_2
+#define Buzzer_GPIO_Port GPIOD
 
 /* USER CODE BEGIN Private defines */
 

Core/Inc/stm32h5xx_hal_conf.h

@@ -80,11 +80,11 @@
 /*#define HAL_SRAM_MODULE_ENABLED */
 #define HAL_TIM_MODULE_ENABLED
 /*#define HAL_RAMCFG_MODULE_ENABLED */
-/*#define HAL_UART_MODULE_ENABLED */
+#define HAL_UART_MODULE_ENABLED
 /*#define HAL_USART_MODULE_ENABLED */
 /*#define HAL_WWDG_MODULE_ENABLED */
 /*#define HAL_PSSI_MODULE_ENABLED */
-#define HAL_ICACHE_MODULE_ENABLED
+/*#define HAL_ICACHE_MODULE_ENABLED */
 /*#define HAL_PCD_MODULE_ENABLED */
 #define HAL_GPIO_MODULE_ENABLED
 #define HAL_EXTI_MODULE_ENABLED

Core/Inc/stm32h5xx_it.h

@@ -52,7 +52,16 @@ void MemManage_Handler(void);
 void BusFault_Handler(void);
 void UsageFault_Handler(void);
 void DebugMon_Handler(void);
-void TIM1_UP_IRQHandler(void);
+void GPDMA1_Channel3_IRQHandler(void);
+void GPDMA1_Channel4_IRQHandler(void);
+void GPDMA1_Channel5_IRQHandler(void);
+void TIM2_IRQHandler(void);
+void TIM3_IRQHandler(void);
+void TIM5_IRQHandler(void);
+void TIM6_IRQHandler(void);
+void USART2_IRQHandler(void);
+void USART3_IRQHandler(void);
+void UART4_IRQHandler(void);
 /* USER CODE BEGIN EFP */
 
 /* USER CODE END EFP */

Core/Inc/tim.h

@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    tim.h
+  * @brief   This file contains all the function prototypes for
+  *          the tim.c file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __TIM_H__
+#define __TIM_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern TIM_HandleTypeDef htim1;
+
+extern TIM_HandleTypeDef htim2;
+
+extern TIM_HandleTypeDef htim3;
+
+extern TIM_HandleTypeDef htim4;
+
+extern TIM_HandleTypeDef htim5;
+
+extern TIM_HandleTypeDef htim8;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_TIM1_Init(void);
+void MX_TIM2_Init(void);
+void MX_TIM3_Init(void);
+void MX_TIM4_Init(void);
+void MX_TIM5_Init(void);
+void MX_TIM8_Init(void);
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __TIM_H__ */
+

Core/Inc/tx_user.h

@@ -115,7 +115,7 @@
 /*#define TX_TIMER_THREAD_STACK_SIZE                1024*/
 /*#define TX_TIMER_THREAD_PRIORITY                0*/
 
-/*#define TX_MINIMUM_STACK                200*/
+#define TX_MINIMUM_STACK                400
 
 /* Determine if timer expirations (application timers, timeouts, and tx_thread_sleep) calls
    should be processed within the a system timer thread or directly in the timer ISR.

Core/Inc/usart.h

@@ -0,0 +1,58 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    usart.h
+  * @brief   This file contains all the function prototypes for
+  *          the usart.c file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USART_H__
+#define __USART_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern UART_HandleTypeDef huart4;
+
+extern UART_HandleTypeDef huart2;
+
+extern UART_HandleTypeDef huart3;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_UART4_Init(void);
+void MX_USART2_UART_Init(void);
+void MX_USART3_UART_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USART_H__ */
+

Core/Src/app_threadx.c

@@ -34,6 +34,18 @@
 /* Private define ------------------------------------------------------------*/
 /* USER CODE BEGIN PD */
 
+// BLE define 
+#define BLE_RX_THREAD_STACK_SIZE 2048
+#define BLE_RX_THREAD_PRIORITY    9
+#define BLE_TX_THREAD_STACK_SIZE 2048
+#define BLE_TX_THREAD_PRIORITY    10
+// IMU thread config
+// IMU thread config
+#define IMU_ANGLE_THREAD_STACK_SIZE  1024
+#define IMU_ANGLE_THREAD_PRIORITY    11
+
+
+
 /* USER CODE END PD */
 
 /* Private macro -------------------------------------------------------------*/
@@ -43,11 +55,57 @@
 
 /* Private variables ---------------------------------------------------------*/
 /* USER CODE BEGIN PV */
+/* ȫ<>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
 
+TX_EVENT_FLAGS_GROUP system_events;
+TX_EVENT_FLAGS_GROUP sensor_events;
+TX_EVENT_FLAGS_GROUP response_events; // 用于避障事件实现
+
+MotorCommand current_motor_cmd = {0,0};
+_GPSData gps_data;
+
+// Ble thread vd
+TX_THREAD ble_rx_thread;
+TX_THREAD ble_tx_thread;
+UCHAR ble_rx_stack[BLE_RX_THREAD_STACK_SIZE];
+UCHAR ble_tx_stack[BLE_TX_THREAD_STACK_SIZE];
+
+TX_QUEUE ble_tx_queue;
+#define BLE_TX_QUEUE_LEN 10
+//ULONG ble_tx_queue_buffer[BLE_TX_QUEUE_LEN]; // 一定要是ULONG类型 之前使用的是BLE_Message
+
+#define BLE_TX_MSG_LEN 64
+#define BLE_TX_QUEUE_LEN 10
+
+__attribute__((aligned(4)))
+ULONG ble_tx_queue_buffer[BLE_TX_QUEUE_LEN * ((BLE_TX_MSG_LEN + sizeof(ULONG) - 1) / sizeof(ULONG))];
+
+// imu
+TX_THREAD imu_angle_thread;
+UCHAR imu_angle_stack[IMU_ANGLE_THREAD_STACK_SIZE];
+
+#define IM948_RX_QUEUE_SIZE 64
+ULONG im948_rx_queue_buffer[IM948_RX_QUEUE_SIZE];
+TX_QUEUE im948_uart_rx_queue;
 /* USER CODE END PV */
 
 /* Private function prototypes -----------------------------------------------*/
 /* USER CODE BEGIN PFP */
+#define GPS_TASK_STACK_SIZE   2048
+#define GPS_TASK_PRIORITY     11
+
+TX_THREAD gps_task;
+ULONG gps_task_stack[GPS_TASK_STACK_SIZE / sizeof(ULONG)];
+
+static TX_THREAD obstacle_thread;
+static UCHAR obstacle_stack[512];
+//超声波
+static UCHAR ultrasonic_stack[512];
+static void obstacle_thread_entry(ULONG);
+TX_THREAD ultrasonic_task_thread;
+
+/* USER CODE END 1 */
+/* USER CODE END 1 */
 
 /* USER CODE END PFP */
 
@@ -58,16 +116,126 @@
   */
 UINT App_ThreadX_Init(VOID *memory_ptr)
 {
-  UINT ret = TX_SUCCESS;
-  /* USER CODE BEGIN App_ThreadX_MEM_POOL */
+    HCBle_SendData("进入 App_ThreadX_Init\r\n");
+//	HCBle_SendData("%d",sizeof(ULONG));
+	UINT status;
 
-  /* USER CODE END App_ThreadX_MEM_POOL */
-  /* USER CODE BEGIN App_ThreadX_Init */
-  /* USER CODE END App_ThreadX_Init */
+	// === 创建 BLE RX 线程 ===
+    status = tx_thread_create(&ble_rx_thread, "BLE RX Thread",
+                              ble_rx_task_entry, 0,
+                              ble_rx_stack, BLE_RX_THREAD_STACK_SIZE,
+                              BLE_RX_THREAD_PRIORITY, BLE_RX_THREAD_PRIORITY,
+                              TX_NO_TIME_SLICE, TX_AUTO_START);
+	
+	if(status != TX_SUCCESS)
+	{
+		return status;
+	}
+	
+    // === 创建 BLE TX 线程 ===
+    status = tx_thread_create(&ble_tx_thread, "BLE TX Thread",
+                              ble_tx_task_entry, 0,
+                              ble_tx_stack, BLE_TX_THREAD_STACK_SIZE,
+                              BLE_TX_THREAD_PRIORITY, BLE_TX_THREAD_PRIORITY,
+                              TX_NO_TIME_SLICE, TX_AUTO_START);
+	
+    if (status != TX_SUCCESS) {
+        HCBle_SendData("❌ BLE TX 线程创建失败，错误码=%d\r\n", status);
+        return status;
+    }
+	
+	    // === 创建 BLE TX 消息队列 ===
+	status = tx_queue_create(&ble_tx_queue, "BLE TX Queue",
+							 (BLE_TX_MSG_LEN + sizeof(ULONG) - 1) / sizeof(ULONG),
+							 ble_tx_queue_buffer,
+							 sizeof(ble_tx_queue_buffer));
 
-  return ret;
+
+     if (status != TX_SUCCESS) {
+        HCBle_SendData("❌ BLE TX 消息队列创建失败，错误码=%d\r\n", status);
+        return status;
+    }
+
+	status = tx_thread_create(&imu_angle_thread, "IMU Angle Thread",
+                          imu_angle_ble_task_entry, 0,
+                          imu_angle_stack, IMU_ANGLE_THREAD_STACK_SIZE,
+                          IMU_ANGLE_THREAD_PRIORITY, IMU_ANGLE_THREAD_PRIORITY,
+                          TX_NO_TIME_SLICE, TX_AUTO_START);
+
+	if (status != TX_SUCCESS) {
+		return status;
+	}
+
+	
+	status = tx_queue_create(&im948_uart_rx_queue, "IM948_RX_QUEUE",
+                               TX_1_ULONG, // sizeof(ULONG) bytes per entry
+                               im948_rx_queue_buffer,
+                               IM948_RX_QUEUE_SIZE * sizeof(ULONG));
+	if(status != TX_SUCCESS)
+	{
+		return status;
+	}
+	
+	status = tx_thread_create(&gps_task,
+                  "GPS Task",
+                  gps_thread_entry,
+                  0,
+                  gps_task_stack,
+                  GPS_TASK_STACK_SIZE,
+                  GPS_TASK_PRIORITY,
+                  GPS_TASK_PRIORITY,
+                  TX_NO_TIME_SLICE,
+                  TX_AUTO_START);
+	
+	if(status != TX_SUCCESS)
+	{
+		return status;
+	}
+	
+	// obstacle_thread create
+	status = tx_thread_create(&obstacle_thread,
+							"obstacle",
+							obstacle_thread_entry,
+							0,obstacle_stack,sizeof(obstacle_stack),8,8,TX_NO_TIME_SLICE,TX_AUTO_START);
+	
+	if(status != TX_SUCCESS)
+	{
+		return status;
+	}
+	
+	 status = tx_thread_create(&ultrasonic_task_thread,
+                     "Ultrasonic",
+                     ultrasonic_task_entry,
+                     0,
+                     ultrasonic_stack,
+                     sizeof(ultrasonic_stack),
+                     7, 7,    // 这里的优先级
+                     TX_NO_TIME_SLICE,
+                     TX_AUTO_START);
+		
+		if(status != TX_SUCCESS)
+	{
+		return status;
+	}
+	
+	//
+//    HCBle_SendData("✅ BLE RX/TX 线程和队列初始化完成\r\n");
+					 
+//	status = ControlThreadCreate();
+//	if(status != TX_SUCCESS)
+//	{
+//		return status;
+//	}			 
+//	status = Encoder_ThreadCreate();	
+//	if(status != TX_SUCCESS)
+//	{
+//		return status;
+//	}	
+	
+    return TX_SUCCESS;
 }
 
+
   /**
   * @brief  Function that implements the kernel's initialization.
   * @param  None
@@ -76,9 +244,8 @@ UINT App_ThreadX_Init(VOID *memory_ptr)
 void MX_ThreadX_Init(void)
 {
   /* USER CODE BEGIN Before_Kernel_Start */
-
+	HCBle_InitEventFlags();  // 这必须在任何使用前调用一次
   /* USER CODE END Before_Kernel_Start */
-
   tx_kernel_enter();
 
   /* USER CODE BEGIN Kernel_Start_Error */
@@ -87,5 +254,48 @@ void MX_ThreadX_Init(void)
 }
 
 /* USER CODE BEGIN 1 */
+//新加入的 obstacle 
+static void obstacle_thread_entry(ULONG arg)
+{
+	while(1)
+	{
+		ULONG evt; // 这个应该是用来接收数据的
+		tx_event_flags_get(&response_events,EVENT_OBSTACLE_DETECTED,TX_OR_CLEAR,&evt,TX_WAIT_FOREVER);
+		
+		switch(obstacle_level)
+		{
+			case 1: // 远
+				Buzzer_Open();
+				Shake_Motor_Open();
+				tx_thread_sleep(30);
+				Buzzer_Close();
+				Shake_Motor_Close();
+				break;
+			
+			case 2:
+				for(int i = 0; i < 2;i++)
+				{
+					Buzzer_Open();
+					Shake_Motor_Open();
+					tx_thread_sleep(50);
+					Buzzer_Close();
+                    Shake_Motor_Close();
+                    tx_thread_sleep(30);
+				}
+				break;
+				
+			case 3: // 近
+				Buzzer_Open();
+				Shake_Motor_Open();
+				tx_thread_sleep(150);
+				Buzzer_Close();
+				Shake_Motor_Close();
+				break;
+			default:
+				break;
+		}
+		tx_thread_sleep(20);
+	}
+}
 
 /* USER CODE END 1 */

Core/Src/gpdma.c

@@ -1,9 +1,9 @@
 /* USER CODE BEGIN Header */
 /**
   ******************************************************************************
-  * @file    icache.c
+  * @file    gpdma.c
   * @brief   This file provides code for the configuration
-  *          of the ICACHE instances.
+  *          of the GPDMA instances.
   ******************************************************************************
   * @attention
   *
@@ -18,37 +18,37 @@
   */
 /* USER CODE END Header */
 /* Includes ------------------------------------------------------------------*/
-#include "icache.h"
+#include "gpdma.h"
 
 /* USER CODE BEGIN 0 */
 
 /* USER CODE END 0 */
 
-/* ICACHE init function */
-void MX_ICACHE_Init(void)
+/* GPDMA1 init function */
+void MX_GPDMA1_Init(void)
 {
 
-  /* USER CODE BEGIN ICACHE_Init 0 */
+  /* USER CODE BEGIN GPDMA1_Init 0 */
 
-  /* USER CODE END ICACHE_Init 0 */
+  /* USER CODE END GPDMA1_Init 0 */
 
-  /* USER CODE BEGIN ICACHE_Init 1 */
+  /* Peripheral clock enable */
+  __HAL_RCC_GPDMA1_CLK_ENABLE();
 
-  /* USER CODE END ICACHE_Init 1 */
+  /* GPDMA1 interrupt Init */
+    HAL_NVIC_SetPriority(GPDMA1_Channel3_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(GPDMA1_Channel3_IRQn);
+    HAL_NVIC_SetPriority(GPDMA1_Channel4_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(GPDMA1_Channel4_IRQn);
+    HAL_NVIC_SetPriority(GPDMA1_Channel5_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(GPDMA1_Channel5_IRQn);
 
-  /** Enable instruction cache in 1-way (direct mapped cache)
-  */
-  if (HAL_ICACHE_ConfigAssociativityMode(ICACHE_1WAY) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  if (HAL_ICACHE_Enable() != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /* USER CODE BEGIN ICACHE_Init 2 */
+  /* USER CODE BEGIN GPDMA1_Init 1 */
 
-  /* USER CODE END ICACHE_Init 2 */
+  /* USER CODE END GPDMA1_Init 1 */
+  /* USER CODE BEGIN GPDMA1_Init 2 */
+
+  /* USER CODE END GPDMA1_Init 2 */
 
 }
 

Core/Src/gpio.c

@@ -41,9 +41,53 @@
 void MX_GPIO_Init(void)
 {
 
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+
   /* GPIO Ports Clock Enable */
   __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
   __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOG, AIN1_Pin|AIN2_Pin|BIN1_Pin|BIN2_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOC, HC_Trig_Pin|Shake_Motor_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(Buzzer_GPIO_Port, Buzzer_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pins : AIN1_Pin AIN2_Pin BIN1_Pin BIN2_Pin */
+  GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|BIN1_Pin|BIN2_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : HC_Trig_Pin */
+  GPIO_InitStruct.Pin = HC_Trig_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(HC_Trig_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : Shake_Motor_Pin */
+  GPIO_InitStruct.Pin = Shake_Motor_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(Shake_Motor_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : Buzzer_Pin */
+  GPIO_InitStruct.Pin = Buzzer_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(Buzzer_GPIO_Port, &GPIO_InitStruct);
 
 }
 

Core/Src/main.c

@@ -19,8 +19,10 @@
 /* Includes ------------------------------------------------------------------*/
 #include "app_threadx.h"
 #include "main.h"
-#include "icache.h"
+#include "gpdma.h"
 #include "memorymap.h"
+#include "tim.h"
+#include "usart.h"
 #include "gpio.h"
 
 /* Private includes ----------------------------------------------------------*/
@@ -46,7 +48,7 @@
 /* Private variables ---------------------------------------------------------*/
 
 /* USER CODE BEGIN PV */
-
+uint8_t rx_byte; // imu_<75><5F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
 /* USER CODE END PV */
 
 /* Private function prototypes -----------------------------------------------*/
@@ -89,9 +91,27 @@ int main(void)
 
   /* Initialize all configured peripherals */
   MX_GPIO_Init();
-  MX_ICACHE_Init();
+  MX_GPDMA1_Init();
+  MX_USART2_UART_Init();
+  MX_TIM2_Init();
+  MX_TIM3_Init();
+  MX_USART3_UART_Init();
+  MX_TIM4_Init();
+  MX_UART4_Init();
+  MX_TIM1_Init();
+  MX_TIM8_Init();
+  MX_TIM5_Init();
   /* USER CODE BEGIN 2 */
 
+   imu600_init();
+   GPS_Init();
+   DWT_Init();
+   PWM_GPIO_TIM_Init();
+   HAL_TIM_IC_Start_IT(&htim5,TIM_CHANNEL_1);
+//   				Buzzer_Open();
+//	HCBle_InitDMAReception();
+//	HAL_Delay(200);
+//	GPS_Init();
   /* USER CODE END 2 */
 
   MX_ThreadX_Init();
@@ -172,7 +192,7 @@ void SystemClock_Config(void)
 
 /**
   * @brief  Period elapsed callback in non blocking mode
-  * @note   This function is called  when TIM1 interrupt took place, inside
+  * @note   This function is called  when TIM6 interrupt took place, inside
   * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
   * a global variable "uwTick" used as application time base.
   * @param  htim : TIM handle
@@ -183,7 +203,7 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
   /* USER CODE BEGIN Callback 0 */
 
   /* USER CODE END Callback 0 */
-  if (htim->Instance == TIM1)
+  if (htim->Instance == TIM6)
   {
     HAL_IncTick();
   }

Core/Src/stm32h5xx_hal_timebase_tim.c

@@ -25,12 +25,12 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
-TIM_HandleTypeDef        htim1;
+TIM_HandleTypeDef        htim6;
 /* Private function prototypes -----------------------------------------------*/
 /* Private functions ---------------------------------------------------------*/
 
 /**
-  * @brief  This function configures the TIM1 as a time base source.
+  * @brief  This function configures the TIM6 as a time base source.
   *         The time source is configured  to have 1ms time base with a dedicated
   *         Tick interrupt priority.
   * @note   This function is called  automatically at the beginning of program after
@@ -41,49 +41,58 @@ TIM_HandleTypeDef        htim1;
 HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
 {
   RCC_ClkInitTypeDef    clkconfig;
-  uint32_t              uwTimclock;
+  uint32_t              uwTimclock, uwAPB1Prescaler;
   uint32_t              uwPrescalerValue;
   uint32_t              pFLatency;
 
   HAL_StatusTypeDef     status;
 
-  /* Enable TIM1 clock */
-  __HAL_RCC_TIM1_CLK_ENABLE();
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
 
   /* Get clock configuration */
   HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
 
-  /* Compute TIM1 clock */
-      uwTimclock = HAL_RCC_GetPCLK2Freq();
+  /* Get APB1 prescaler */
+  uwAPB1Prescaler = clkconfig.APB1CLKDivider;
+  /* Compute TIM6 clock */
+  if (uwAPB1Prescaler == RCC_HCLK_DIV1)
+  {
+    uwTimclock = HAL_RCC_GetPCLK1Freq();
+  }
+  else
+  {
+    uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
+  }
 
-  /* Compute the prescaler value to have TIM1 counter clock equal to 100KHz */
+  /* Compute the prescaler value to have TIM6 counter clock equal to 100KHz */
   uwPrescalerValue = (uint32_t) ((uwTimclock / 100000U) - 1U);
 
-  /* Initialize TIM1 */
-  htim1.Instance = TIM1;
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
 
   /* Initialize TIMx peripheral as follow:
-   * Period = [(TIM1CLK/1000) - 1]. to have a (1/1000) s time base.
+   * Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
    * Prescaler = (uwTimclock/100000 - 1) to have a 100KHz counter clock.
    * ClockDivision = 0
    * Counter direction = Up
    */
-  htim1.Init.Period = (100000U / 1000U) - 1U;
-  htim1.Init.Prescaler = uwPrescalerValue;
-  htim1.Init.ClockDivision = 0;
-  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim6.Init.Period = (100000U / 1000U) - 1U;
+  htim6.Init.Prescaler = uwPrescalerValue;
+  htim6.Init.ClockDivision = 0;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 
-  status = HAL_TIM_Base_Init(&htim1);
+  status = HAL_TIM_Base_Init(&htim6);
   if (status == HAL_OK)
   {
     /* Start the TIM time Base generation in interrupt mode */
-    status = HAL_TIM_Base_Start_IT(&htim1);
+    status = HAL_TIM_Base_Start_IT(&htim6);
     if (status == HAL_OK)
     {
       if (TickPriority < (1UL << __NVIC_PRIO_BITS))
       {
-        /* Enable the TIM1 global Interrupt */
-        HAL_NVIC_SetPriority(TIM1_UP_IRQn, TickPriority, 0U);
+        /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_SetPriority(TIM6_IRQn, TickPriority, 0U);
         uwTickPrio = TickPriority;
       }
       else
@@ -93,8 +102,8 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
     }
 }
 
-  /* Enable the TIM1 global Interrupt */
-  HAL_NVIC_EnableIRQ(TIM1_UP_IRQn);
+  /* Enable the TIM6 global Interrupt */
+  HAL_NVIC_EnableIRQ(TIM6_IRQn);
 
   /* Return function status */
   return status;
@@ -102,25 +111,25 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
 
 /**
   * @brief  Suspend Tick increment.
-  * @note   Disable the tick increment by disabling TIM1 update interrupt.
+  * @note   Disable the tick increment by disabling TIM6 update interrupt.
   * @param  None
   * @retval None
   */
 void HAL_SuspendTick(void)
 {
-  /* Disable TIM1 update Interrupt */
-  __HAL_TIM_DISABLE_IT(&htim1, TIM_IT_UPDATE);
+  /* Disable TIM6 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
 }
 
 /**
   * @brief  Resume Tick increment.
-  * @note   Enable the tick increment by Enabling TIM1 update interrupt.
+  * @note   Enable the tick increment by Enabling TIM6 update interrupt.
   * @param  None
   * @retval None
   */
 void HAL_ResumeTick(void)
 {
-  /* Enable TIM1 Update interrupt */
-  __HAL_TIM_ENABLE_IT(&htim1, TIM_IT_UPDATE);
+  /* Enable TIM6 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
 }
 

Core/Src/stm32h5xx_it.c

@@ -22,6 +22,7 @@
 #include "stm32h5xx_it.h"
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
+#include "headfile.h"
 /* USER CODE END Includes */
 
 /* Private typedef -----------------------------------------------------------*/
@@ -55,7 +56,20 @@
 /* USER CODE END 0 */
 
 /* External variables --------------------------------------------------------*/
-extern TIM_HandleTypeDef htim1;
+extern TIM_HandleTypeDef htim2;
+extern TIM_HandleTypeDef htim3;
+extern TIM_HandleTypeDef htim5;
+extern DMA_NodeTypeDef Node_GPDMA1_Channel5;
+extern DMA_QListTypeDef List_GPDMA1_Channel5;
+extern DMA_HandleTypeDef handle_GPDMA1_Channel5;
+extern DMA_HandleTypeDef handle_GPDMA1_Channel4;
+extern DMA_NodeTypeDef Node_GPDMA1_Channel3;
+extern DMA_QListTypeDef List_GPDMA1_Channel3;
+extern DMA_HandleTypeDef handle_GPDMA1_Channel3;
+extern UART_HandleTypeDef huart4;
+extern UART_HandleTypeDef huart2;
+extern UART_HandleTypeDef huart3;
+extern TIM_HandleTypeDef htim6;
 
 /* USER CODE BEGIN EV */
 
@@ -160,17 +174,143 @@ void DebugMon_Handler(void)
 /******************************************************************************/
 
 /**
-  * @brief This function handles TIM1 Update interrupt.
+  * @brief This function handles GPDMA1 Channel 3 global interrupt.
   */
-void TIM1_UP_IRQHandler(void)
+void GPDMA1_Channel3_IRQHandler(void)
 {
-  /* USER CODE BEGIN TIM1_UP_IRQn 0 */
+  /* USER CODE BEGIN GPDMA1_Channel3_IRQn 0 */
 
-  /* USER CODE END TIM1_UP_IRQn 0 */
-  HAL_TIM_IRQHandler(&htim1);
-  /* USER CODE BEGIN TIM1_UP_IRQn 1 */
+  /* USER CODE END GPDMA1_Channel3_IRQn 0 */
+  HAL_DMA_IRQHandler(&handle_GPDMA1_Channel3);
+  /* USER CODE BEGIN GPDMA1_Channel3_IRQn 1 */
 
-  /* USER CODE END TIM1_UP_IRQn 1 */
+  /* USER CODE END GPDMA1_Channel3_IRQn 1 */
+}
+
+/**
+  * @brief This function handles GPDMA1 Channel 4 global interrupt.
+  */
+void GPDMA1_Channel4_IRQHandler(void)
+{
+  /* USER CODE BEGIN GPDMA1_Channel4_IRQn 0 */
+
+  /* USER CODE END GPDMA1_Channel4_IRQn 0 */
+  HAL_DMA_IRQHandler(&handle_GPDMA1_Channel4);
+  /* USER CODE BEGIN GPDMA1_Channel4_IRQn 1 */
+
+  /* USER CODE END GPDMA1_Channel4_IRQn 1 */
+}
+
+/**
+  * @brief This function handles GPDMA1 Channel 5 global interrupt.
+  */
+void GPDMA1_Channel5_IRQHandler(void)
+{
+  /* USER CODE BEGIN GPDMA1_Channel5_IRQn 0 */
+
+  /* USER CODE END GPDMA1_Channel5_IRQn 0 */
+  HAL_DMA_IRQHandler(&handle_GPDMA1_Channel5);
+  /* USER CODE BEGIN GPDMA1_Channel5_IRQn 1 */
+
+  /* USER CODE END GPDMA1_Channel5_IRQn 1 */
+}
+
+/**
+  * @brief This function handles TIM2 global interrupt.
+  */
+void TIM2_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM2_IRQn 0 */
+
+  /* USER CODE END TIM2_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim2);
+  /* USER CODE BEGIN TIM2_IRQn 1 */
+
+  /* USER CODE END TIM2_IRQn 1 */
+}
+
+/**
+  * @brief This function handles TIM3 global interrupt.
+  */
+void TIM3_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM3_IRQn 0 */
+
+  /* USER CODE END TIM3_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim3);
+  /* USER CODE BEGIN TIM3_IRQn 1 */
+
+  /* USER CODE END TIM3_IRQn 1 */
+}
+
+/**
+  * @brief This function handles TIM5 global interrupt.
+  */
+void TIM5_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM5_IRQn 0 */
+
+  /* USER CODE END TIM5_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim5);
+  /* USER CODE BEGIN TIM5_IRQn 1 */
+
+  /* USER CODE END TIM5_IRQn 1 */
+}
+
+/**
+  * @brief This function handles TIM6 global interrupt.
+  */
+void TIM6_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_IRQn 0 */
+
+  /* USER CODE END TIM6_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+  /* USER CODE BEGIN TIM6_IRQn 1 */
+
+  /* USER CODE END TIM6_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USART2 global interrupt.
+  */
+void USART2_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART2_IRQn 0 */
+
+  /* USER CODE END USART2_IRQn 0 */
+  HAL_UART_IRQHandler(&huart2);
+  /* USER CODE BEGIN USART2_IRQn 1 */
+
+  /* USER CODE END USART2_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USART3 global interrupt.
+  */
+void USART3_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART3_IRQn 0 */
+
+  /* USER CODE END USART3_IRQn 0 */
+  HAL_UART_IRQHandler(&huart3);
+  /* USER CODE BEGIN USART3_IRQn 1 */
+
+  /* USER CODE END USART3_IRQn 1 */
+}
+
+/**
+  * @brief This function handles UART4 global interrupt.
+  */
+void UART4_IRQHandler(void)
+{
+  /* USER CODE BEGIN UART4_IRQn 0 */
+
+  /* USER CODE END UART4_IRQn 0 */
+  HAL_UART_IRQHandler(&huart4);
+  /* USER CODE BEGIN UART4_IRQn 1 */
+
+  /* USER CODE END UART4_IRQn 1 */
 }
 
 /* USER CODE BEGIN 1 */

Core/Src/tim.c

@@ -0,0 +1,608 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    tim.c
+  * @brief   This file provides code for the configuration
+  *          of the TIM instances.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "tim.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+TIM_HandleTypeDef htim1;
+TIM_HandleTypeDef htim2;
+TIM_HandleTypeDef htim3;
+TIM_HandleTypeDef htim4;
+TIM_HandleTypeDef htim5;
+TIM_HandleTypeDef htim8;
+
+/* TIM1 init function */
+void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_Encoder_InitTypeDef sConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 0;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 65535;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
+  sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
+  sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
+  sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
+  sConfig.IC1Filter = 0;
+  sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
+  sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
+  sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
+  sConfig.IC2Filter = 0;
+  if (HAL_TIM_Encoder_Init(&htim1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+/* TIM2 init function */
+void MX_TIM2_Init(void)
+{
+
+  /* USER CODE BEGIN TIM2_Init 0 */
+
+  /* USER CODE END TIM2_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM2_Init 1 */
+
+  /* USER CODE END TIM2_Init 1 */
+  htim2.Instance = TIM2;
+  htim2.Init.Prescaler = 250 - 1;
+  htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim2.Init.Period = 4294967295;
+  htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM2_Init 2 */
+
+  /* USER CODE END TIM2_Init 2 */
+
+}
+/* TIM3 init function */
+void MX_TIM3_Init(void)
+{
+
+  /* USER CODE BEGIN TIM3_Init 0 */
+
+  /* USER CODE END TIM3_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_OC_InitTypeDef sConfigOC = {0};
+
+  /* USER CODE BEGIN TIM3_Init 1 */
+
+  /* USER CODE END TIM3_Init 1 */
+  htim3.Instance = TIM3;
+  htim3.Init.Prescaler = 48;
+  htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim3.Init.Period = 255;
+  htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.OCMode = TIM_OCMODE_PWM1;
+  sConfigOC.Pulse = 0;
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+  if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM3_Init 2 */
+
+  /* USER CODE END TIM3_Init 2 */
+  HAL_TIM_MspPostInit(&htim3);
+
+}
+/* TIM4 init function */
+void MX_TIM4_Init(void)
+{
+
+  /* USER CODE BEGIN TIM4_Init 0 */
+
+  /* USER CODE END TIM4_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_OC_InitTypeDef sConfigOC = {0};
+
+  /* USER CODE BEGIN TIM4_Init 1 */
+
+  /* USER CODE END TIM4_Init 1 */
+  htim4.Instance = TIM4;
+  htim4.Init.Prescaler = 48;
+  htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim4.Init.Period = 255;
+  htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.OCMode = TIM_OCMODE_PWM1;
+  sConfigOC.Pulse = 0;
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+  if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM4_Init 2 */
+
+  /* USER CODE END TIM4_Init 2 */
+  HAL_TIM_MspPostInit(&htim4);
+
+}
+/* TIM5 init function */
+void MX_TIM5_Init(void)
+{
+
+  /* USER CODE BEGIN TIM5_Init 0 */
+
+  /* USER CODE END TIM5_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_IC_InitTypeDef sConfigIC = {0};
+
+  /* USER CODE BEGIN TIM5_Init 1 */
+
+  /* USER CODE END TIM5_Init 1 */
+  htim5.Instance = TIM5;
+  htim5.Init.Prescaler = 250-1;
+  htim5.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim5.Init.Period = 4294967295;
+  htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim5.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim5) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim5, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_IC_Init(&htim5) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
+  sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
+  sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
+  sConfigIC.ICFilter = 0;
+  if (HAL_TIM_IC_ConfigChannel(&htim5, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM5_Init 2 */
+
+  /* USER CODE END TIM5_Init 2 */
+
+}
+/* TIM8 init function */
+void MX_TIM8_Init(void)
+{
+
+  /* USER CODE BEGIN TIM8_Init 0 */
+
+  /* USER CODE END TIM8_Init 0 */
+
+  TIM_Encoder_InitTypeDef sConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM8_Init 1 */
+
+  /* USER CODE END TIM8_Init 1 */
+  htim8.Instance = TIM8;
+  htim8.Init.Prescaler = 0;
+  htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim8.Init.Period = 65535;
+  htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim8.Init.RepetitionCounter = 0;
+  htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
+  sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
+  sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
+  sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
+  sConfig.IC1Filter = 0;
+  sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
+  sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
+  sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
+  sConfig.IC2Filter = 0;
+  if (HAL_TIM_Encoder_Init(&htim8, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM8_Init 2 */
+
+  /* USER CODE END TIM8_Init 2 */
+
+}
+
+void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* tim_encoderHandle)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(tim_encoderHandle->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspInit 0 */
+
+  /* USER CODE END TIM1_MspInit 0 */
+    /* TIM1 clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+    /**TIM1 GPIO Configuration
+    PE9     ------> TIM1_CH1
+    PE11     ------> TIM1_CH2
+    */
+    GPIO_InitStruct.Pin = E1A_Pin|E1B_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN TIM1_MspInit 1 */
+
+  /* USER CODE END TIM1_MspInit 1 */
+  }
+  else if(tim_encoderHandle->Instance==TIM8)
+  {
+  /* USER CODE BEGIN TIM8_MspInit 0 */
+
+  /* USER CODE END TIM8_MspInit 0 */
+    /* TIM8 clock enable */
+    __HAL_RCC_TIM8_CLK_ENABLE();
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    /**TIM8 GPIO Configuration
+    PC6     ------> TIM8_CH1
+    PC7     ------> TIM8_CH2
+    */
+    GPIO_InitStruct.Pin = E2A_Pin|E2B_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF3_TIM8;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN TIM8_MspInit 1 */
+
+  /* USER CODE END TIM8_MspInit 1 */
+  }
+}
+
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(tim_baseHandle->Instance==TIM2)
+  {
+  /* USER CODE BEGIN TIM2_MspInit 0 */
+
+  /* USER CODE END TIM2_MspInit 0 */
+    /* TIM2 clock enable */
+    __HAL_RCC_TIM2_CLK_ENABLE();
+
+    /* TIM2 interrupt Init */
+    HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(TIM2_IRQn);
+  /* USER CODE BEGIN TIM2_MspInit 1 */
+
+  /* USER CODE END TIM2_MspInit 1 */
+  }
+  else if(tim_baseHandle->Instance==TIM3)
+  {
+  /* USER CODE BEGIN TIM3_MspInit 0 */
+
+  /* USER CODE END TIM3_MspInit 0 */
+    /* TIM3 clock enable */
+    __HAL_RCC_TIM3_CLK_ENABLE();
+
+    /* TIM3 interrupt Init */
+    HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(TIM3_IRQn);
+  /* USER CODE BEGIN TIM3_MspInit 1 */
+
+  /* USER CODE END TIM3_MspInit 1 */
+  }
+  else if(tim_baseHandle->Instance==TIM4)
+  {
+  /* USER CODE BEGIN TIM4_MspInit 0 */
+
+  /* USER CODE END TIM4_MspInit 0 */
+    /* TIM4 clock enable */
+    __HAL_RCC_TIM4_CLK_ENABLE();
+  /* USER CODE BEGIN TIM4_MspInit 1 */
+
+  /* USER CODE END TIM4_MspInit 1 */
+  }
+  else if(tim_baseHandle->Instance==TIM5)
+  {
+  /* USER CODE BEGIN TIM5_MspInit 0 */
+
+  /* USER CODE END TIM5_MspInit 0 */
+    /* TIM5 clock enable */
+    __HAL_RCC_TIM5_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**TIM5 GPIO Configuration
+    PA0     ------> TIM5_CH1
+    */
+    GPIO_InitStruct.Pin = HC_Echo_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF2_TIM5;
+    HAL_GPIO_Init(HC_Echo_GPIO_Port, &GPIO_InitStruct);
+
+    /* TIM5 interrupt Init */
+    HAL_NVIC_SetPriority(TIM5_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(TIM5_IRQn);
+  /* USER CODE BEGIN TIM5_MspInit 1 */
+
+  /* USER CODE END TIM5_MspInit 1 */
+  }
+}
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(timHandle->Instance==TIM3)
+  {
+  /* USER CODE BEGIN TIM3_MspPostInit 0 */
+
+  /* USER CODE END TIM3_MspPostInit 0 */
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**TIM3 GPIO Configuration
+    PB1     ------> TIM3_CH4
+    */
+    GPIO_InitStruct.Pin = PWMB_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
+    HAL_GPIO_Init(PWMB_GPIO_Port, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN TIM3_MspPostInit 1 */
+
+  /* USER CODE END TIM3_MspPostInit 1 */
+  }
+  else if(timHandle->Instance==TIM4)
+  {
+  /* USER CODE BEGIN TIM4_MspPostInit 0 */
+
+  /* USER CODE END TIM4_MspPostInit 0 */
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    /**TIM4 GPIO Configuration
+    PC2     ------> TIM4_CH4
+    */
+    GPIO_InitStruct.Pin = PWMA_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
+    HAL_GPIO_Init(PWMA_GPIO_Port, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN TIM4_MspPostInit 1 */
+
+  /* USER CODE END TIM4_MspPostInit 1 */
+  }
+
+}
+
+void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef* tim_encoderHandle)
+{
+
+  if(tim_encoderHandle->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+  /* USER CODE END TIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM1_CLK_DISABLE();
+
+    /**TIM1 GPIO Configuration
+    PE9     ------> TIM1_CH1
+    PE11     ------> TIM1_CH2
+    */
+    HAL_GPIO_DeInit(GPIOE, E1A_Pin|E1B_Pin);
+
+  /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+  /* USER CODE END TIM1_MspDeInit 1 */
+  }
+  else if(tim_encoderHandle->Instance==TIM8)
+  {
+  /* USER CODE BEGIN TIM8_MspDeInit 0 */
+
+  /* USER CODE END TIM8_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM8_CLK_DISABLE();
+
+    /**TIM8 GPIO Configuration
+    PC6     ------> TIM8_CH1
+    PC7     ------> TIM8_CH2
+    */
+    HAL_GPIO_DeInit(GPIOC, E2A_Pin|E2B_Pin);
+
+  /* USER CODE BEGIN TIM8_MspDeInit 1 */
+
+  /* USER CODE END TIM8_MspDeInit 1 */
+  }
+}
+
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
+{
+
+  if(tim_baseHandle->Instance==TIM2)
+  {
+  /* USER CODE BEGIN TIM2_MspDeInit 0 */
+
+  /* USER CODE END TIM2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM2_CLK_DISABLE();
+
+    /* TIM2 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(TIM2_IRQn);
+  /* USER CODE BEGIN TIM2_MspDeInit 1 */
+
+  /* USER CODE END TIM2_MspDeInit 1 */
+  }
+  else if(tim_baseHandle->Instance==TIM3)
+  {
+  /* USER CODE BEGIN TIM3_MspDeInit 0 */
+
+  /* USER CODE END TIM3_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM3_CLK_DISABLE();
+
+    /* TIM3 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(TIM3_IRQn);
+  /* USER CODE BEGIN TIM3_MspDeInit 1 */
+
+  /* USER CODE END TIM3_MspDeInit 1 */
+  }
+  else if(tim_baseHandle->Instance==TIM4)
+  {
+  /* USER CODE BEGIN TIM4_MspDeInit 0 */
+
+  /* USER CODE END TIM4_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM4_CLK_DISABLE();
+  /* USER CODE BEGIN TIM4_MspDeInit 1 */
+
+  /* USER CODE END TIM4_MspDeInit 1 */
+  }
+  else if(tim_baseHandle->Instance==TIM5)
+  {
+  /* USER CODE BEGIN TIM5_MspDeInit 0 */
+
+  /* USER CODE END TIM5_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM5_CLK_DISABLE();
+
+    /**TIM5 GPIO Configuration
+    PA0     ------> TIM5_CH1
+    */
+    HAL_GPIO_DeInit(HC_Echo_GPIO_Port, HC_Echo_Pin);
+
+    /* TIM5 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(TIM5_IRQn);
+  /* USER CODE BEGIN TIM5_MspDeInit 1 */
+
+  /* USER CODE END TIM5_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

Core/Src/usart.c

@@ -0,0 +1,512 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    usart.c
+  * @brief   This file provides code for the configuration
+  *          of the USART instances.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "usart.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+UART_HandleTypeDef huart4;
+UART_HandleTypeDef huart2;
+UART_HandleTypeDef huart3;
+DMA_NodeTypeDef Node_GPDMA1_Channel5;
+DMA_QListTypeDef List_GPDMA1_Channel5;
+DMA_HandleTypeDef handle_GPDMA1_Channel5;
+DMA_HandleTypeDef handle_GPDMA1_Channel4;
+DMA_NodeTypeDef Node_GPDMA1_Channel3;
+DMA_QListTypeDef List_GPDMA1_Channel3;
+DMA_HandleTypeDef handle_GPDMA1_Channel3;
+
+/* UART4 init function */
+void MX_UART4_Init(void)
+{
+
+  /* USER CODE BEGIN UART4_Init 0 */
+
+  /* USER CODE END UART4_Init 0 */
+
+  /* USER CODE BEGIN UART4_Init 1 */
+
+  /* USER CODE END UART4_Init 1 */
+  huart4.Instance = UART4;
+  huart4.Init.BaudRate = 9600;
+  huart4.Init.WordLength = UART_WORDLENGTH_8B;
+  huart4.Init.StopBits = UART_STOPBITS_1;
+  huart4.Init.Parity = UART_PARITY_NONE;
+  huart4.Init.Mode = UART_MODE_TX_RX;
+  huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart4.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart4.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart4.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart4.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart4, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart4, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&huart4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN UART4_Init 2 */
+
+  /* USER CODE END UART4_Init 2 */
+
+}
+/* USART2 init function */
+
+void MX_USART2_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART2_Init 0 */
+
+  /* USER CODE END USART2_Init 0 */
+
+  /* USER CODE BEGIN USART2_Init 1 */
+
+  /* USER CODE END USART2_Init 1 */
+  huart2.Instance = USART2;
+  huart2.Init.BaudRate = 9600;
+  huart2.Init.WordLength = UART_WORDLENGTH_8B;
+  huart2.Init.StopBits = UART_STOPBITS_1;
+  huart2.Init.Parity = UART_PARITY_NONE;
+  huart2.Init.Mode = UART_MODE_TX_RX;
+  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART2_Init 2 */
+
+  /* USER CODE END USART2_Init 2 */
+
+}
+/* USART3 init function */
+
+void MX_USART3_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART3_Init 0 */
+
+  /* USER CODE END USART3_Init 0 */
+
+  /* USER CODE BEGIN USART3_Init 1 */
+
+  /* USER CODE END USART3_Init 1 */
+  huart3.Instance = USART3;
+  huart3.Init.BaudRate = 115200;
+  huart3.Init.WordLength = UART_WORDLENGTH_8B;
+  huart3.Init.StopBits = UART_STOPBITS_1;
+  huart3.Init.Parity = UART_PARITY_NONE;
+  huart3.Init.Mode = UART_MODE_TX_RX;
+  huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart3.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART3_Init 2 */
+
+  /* USER CODE END USART3_Init 2 */
+
+}
+
+void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  DMA_NodeConfTypeDef NodeConfig= {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+  if(uartHandle->Instance==UART4)
+  {
+  /* USER CODE BEGIN UART4_MspInit 0 */
+
+  /* USER CODE END UART4_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART4;
+    PeriphClkInitStruct.Uart4ClockSelection = RCC_UART4CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* UART4 clock enable */
+    __HAL_RCC_UART4_CLK_ENABLE();
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**UART4 GPIO Configuration
+    PB8     ------> UART4_RX
+    PB9     ------> UART4_TX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF8_UART4;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    /* UART4 DMA Init */
+    /* GPDMA1_REQUEST_UART4_RX Init */
+    NodeConfig.NodeType = DMA_GPDMA_LINEAR_NODE;
+    NodeConfig.Init.Request = GPDMA1_REQUEST_UART4_RX;
+    NodeConfig.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
+    NodeConfig.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    NodeConfig.Init.SrcInc = DMA_SINC_FIXED;
+    NodeConfig.Init.DestInc = DMA_DINC_FIXED;
+    NodeConfig.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
+    NodeConfig.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;
+    NodeConfig.Init.SrcBurstLength = 1;
+    NodeConfig.Init.DestBurstLength = 1;
+    NodeConfig.Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT1|DMA_DEST_ALLOCATED_PORT1;
+    NodeConfig.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
+    NodeConfig.Init.Mode = DMA_NORMAL;
+    NodeConfig.TriggerConfig.TriggerPolarity = DMA_TRIG_POLARITY_MASKED;
+    NodeConfig.DataHandlingConfig.DataExchange = DMA_EXCHANGE_NONE;
+    NodeConfig.DataHandlingConfig.DataAlignment = DMA_DATA_RIGHTALIGN_ZEROPADDED;
+    if (HAL_DMAEx_List_BuildNode(&NodeConfig, &Node_GPDMA1_Channel5) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    if (HAL_DMAEx_List_InsertNode(&List_GPDMA1_Channel5, NULL, &Node_GPDMA1_Channel5) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    if (HAL_DMAEx_List_SetCircularMode(&List_GPDMA1_Channel5) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    handle_GPDMA1_Channel5.Instance = GPDMA1_Channel5;
+    handle_GPDMA1_Channel5.InitLinkedList.Priority = DMA_LOW_PRIORITY_LOW_WEIGHT;
+    handle_GPDMA1_Channel5.InitLinkedList.LinkStepMode = DMA_LSM_FULL_EXECUTION;
+    handle_GPDMA1_Channel5.InitLinkedList.LinkAllocatedPort = DMA_LINK_ALLOCATED_PORT1;
+    handle_GPDMA1_Channel5.InitLinkedList.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
+    handle_GPDMA1_Channel5.InitLinkedList.LinkedListMode = DMA_LINKEDLIST_CIRCULAR;
+    if (HAL_DMAEx_List_Init(&handle_GPDMA1_Channel5) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    if (HAL_DMAEx_List_LinkQ(&handle_GPDMA1_Channel5, &List_GPDMA1_Channel5) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(uartHandle, hdmarx, handle_GPDMA1_Channel5);
+
+    if (HAL_DMA_ConfigChannelAttributes(&handle_GPDMA1_Channel5, DMA_CHANNEL_NPRIV) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* GPDMA1_REQUEST_UART4_TX Init */
+    handle_GPDMA1_Channel4.Instance = GPDMA1_Channel4;
+    handle_GPDMA1_Channel4.Init.Request = GPDMA1_REQUEST_UART4_TX;
+    handle_GPDMA1_Channel4.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
+    handle_GPDMA1_Channel4.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    handle_GPDMA1_Channel4.Init.SrcInc = DMA_SINC_INCREMENTED;
+    handle_GPDMA1_Channel4.Init.DestInc = DMA_DINC_FIXED;
+    handle_GPDMA1_Channel4.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
+    handle_GPDMA1_Channel4.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;
+    handle_GPDMA1_Channel4.Init.Priority = DMA_LOW_PRIORITY_LOW_WEIGHT;
+    handle_GPDMA1_Channel4.Init.SrcBurstLength = 1;
+    handle_GPDMA1_Channel4.Init.DestBurstLength = 1;
+    handle_GPDMA1_Channel4.Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT0|DMA_DEST_ALLOCATED_PORT0;
+    handle_GPDMA1_Channel4.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
+    handle_GPDMA1_Channel4.Init.Mode = DMA_NORMAL;
+    if (HAL_DMA_Init(&handle_GPDMA1_Channel4) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(uartHandle, hdmatx, handle_GPDMA1_Channel4);
+
+    if (HAL_DMA_ConfigChannelAttributes(&handle_GPDMA1_Channel4, DMA_CHANNEL_NPRIV) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* UART4 interrupt Init */
+    HAL_NVIC_SetPriority(UART4_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(UART4_IRQn);
+  /* USER CODE BEGIN UART4_MspInit 1 */
+
+  /* USER CODE END UART4_MspInit 1 */
+  }
+  else if(uartHandle->Instance==USART2)
+  {
+  /* USER CODE BEGIN USART2_MspInit 0 */
+
+  /* USER CODE END USART2_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2;
+    PeriphClkInitStruct.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* USART2 clock enable */
+    __HAL_RCC_USART2_CLK_ENABLE();
+
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**USART2 GPIO Configuration
+    PD5     ------> USART2_TX
+    PD6     ------> USART2_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+    /* USART2 DMA Init */
+    /* GPDMA1_REQUEST_USART2_RX Init */
+    NodeConfig.NodeType = DMA_GPDMA_LINEAR_NODE;
+    NodeConfig.Init.Request = GPDMA1_REQUEST_USART2_RX;
+    NodeConfig.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
+    NodeConfig.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    NodeConfig.Init.SrcInc = DMA_SINC_FIXED;
+    NodeConfig.Init.DestInc = DMA_DINC_FIXED;
+    NodeConfig.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
+    NodeConfig.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;
+    NodeConfig.Init.SrcBurstLength = 1;
+    NodeConfig.Init.DestBurstLength = 1;
+    NodeConfig.Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT0|DMA_DEST_ALLOCATED_PORT0;
+    NodeConfig.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
+    NodeConfig.Init.Mode = DMA_NORMAL;
+    NodeConfig.TriggerConfig.TriggerPolarity = DMA_TRIG_POLARITY_MASKED;
+    NodeConfig.DataHandlingConfig.DataExchange = DMA_EXCHANGE_NONE;
+    NodeConfig.DataHandlingConfig.DataAlignment = DMA_DATA_RIGHTALIGN_ZEROPADDED;
+    if (HAL_DMAEx_List_BuildNode(&NodeConfig, &Node_GPDMA1_Channel3) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    if (HAL_DMAEx_List_InsertNode(&List_GPDMA1_Channel3, NULL, &Node_GPDMA1_Channel3) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    if (HAL_DMAEx_List_SetCircularMode(&List_GPDMA1_Channel3) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    handle_GPDMA1_Channel3.Instance = GPDMA1_Channel3;
+    handle_GPDMA1_Channel3.InitLinkedList.Priority = DMA_LOW_PRIORITY_LOW_WEIGHT;
+    handle_GPDMA1_Channel3.InitLinkedList.LinkStepMode = DMA_LSM_FULL_EXECUTION;
+    handle_GPDMA1_Channel3.InitLinkedList.LinkAllocatedPort = DMA_LINK_ALLOCATED_PORT0;
+    handle_GPDMA1_Channel3.InitLinkedList.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
+    handle_GPDMA1_Channel3.InitLinkedList.LinkedListMode = DMA_LINKEDLIST_CIRCULAR;
+    if (HAL_DMAEx_List_Init(&handle_GPDMA1_Channel3) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    if (HAL_DMAEx_List_LinkQ(&handle_GPDMA1_Channel3, &List_GPDMA1_Channel3) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(uartHandle, hdmarx, handle_GPDMA1_Channel3);
+
+    if (HAL_DMA_ConfigChannelAttributes(&handle_GPDMA1_Channel3, DMA_CHANNEL_NPRIV) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* USART2 interrupt Init */
+    HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(USART2_IRQn);
+  /* USER CODE BEGIN USART2_MspInit 1 */
+
+  /* USER CODE END USART2_MspInit 1 */
+  }
+  else if(uartHandle->Instance==USART3)
+  {
+  /* USER CODE BEGIN USART3_MspInit 0 */
+
+  /* USER CODE END USART3_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;
+    PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* USART3 clock enable */
+    __HAL_RCC_USART3_CLK_ENABLE();
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    /**USART3 GPIO Configuration
+    PB10     ------> USART3_TX
+    PC11     ------> USART3_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    /* USART3 interrupt Init */
+    HAL_NVIC_SetPriority(USART3_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(USART3_IRQn);
+  /* USER CODE BEGIN USART3_MspInit 1 */
+
+  /* USER CODE END USART3_MspInit 1 */
+  }
+}
+
+void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
+{
+
+  if(uartHandle->Instance==UART4)
+  {
+  /* USER CODE BEGIN UART4_MspDeInit 0 */
+
+  /* USER CODE END UART4_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_UART4_CLK_DISABLE();
+
+    /**UART4 GPIO Configuration
+    PB8     ------> UART4_RX
+    PB9     ------> UART4_TX
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8|GPIO_PIN_9);
+
+    /* UART4 DMA DeInit */
+    HAL_DMA_DeInit(uartHandle->hdmarx);
+    HAL_DMA_DeInit(uartHandle->hdmatx);
+
+    /* UART4 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(UART4_IRQn);
+  /* USER CODE BEGIN UART4_MspDeInit 1 */
+
+  /* USER CODE END UART4_MspDeInit 1 */
+  }
+  else if(uartHandle->Instance==USART2)
+  {
+  /* USER CODE BEGIN USART2_MspDeInit 0 */
+
+  /* USER CODE END USART2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART2_CLK_DISABLE();
+
+    /**USART2 GPIO Configuration
+    PD5     ------> USART2_TX
+    PD6     ------> USART2_RX
+    */
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5|GPIO_PIN_6);
+
+    /* USART2 DMA DeInit */
+    HAL_DMA_DeInit(uartHandle->hdmarx);
+
+    /* USART2 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(USART2_IRQn);
+  /* USER CODE BEGIN USART2_MspDeInit 1 */
+
+  /* USER CODE END USART2_MspDeInit 1 */
+  }
+  else if(uartHandle->Instance==USART3)
+  {
+  /* USER CODE BEGIN USART3_MspDeInit 0 */
+
+  /* USER CODE END USART3_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART3_CLK_DISABLE();
+
+    /**USART3 GPIO Configuration
+    PB10     ------> USART3_TX
+    PC11     ------> USART3_RX
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10);
+
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_11);
+
+    /* USART3 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(USART3_IRQn);
+  /* USER CODE BEGIN USART3_MspDeInit 1 */
+
+  /* USER CODE END USART3_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_icache.h

@@ -1,300 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32h5xx_hal_icache.h
-  * @author  MCD Application Team
-  * @brief   Header file of ICACHE HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2023 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion ------------------------------------*/
-#ifndef STM32H5xx_HAL_ICACHE_H
-#define STM32H5xx_HAL_ICACHE_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes -----------------------------------------------------------------*/
-#include "stm32h5xx_hal_def.h"
-
-#if defined(ICACHE)
-/** @addtogroup STM32H5xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup ICACHE
-  * @{
-  */
-
-/* Exported types -----------------------------------------------------------*/
-#if defined(ICACHE_CRRx_REN)
-/** @defgroup ICACHE_Exported_Types ICACHE Exported Types
-  * @{
-  */
-
-/**
-  * @brief  HAL ICACHE region configuration structure definition
-  */
-typedef struct
-{
-  uint32_t BaseAddress;              /*!< Configures the Base address of Region i to be remapped */
-
-  uint32_t RemapAddress;             /*!< Configures the Remap address of Region i to be remapped */
-
-  uint32_t Size;                     /*!< Configures the Region size.
-                                          This parameter can be a value of @ref ICACHE_Region_Size */
-
-  uint32_t TrafficRoute;             /*!< Selects the traffic route.
-                                          This parameter can be a value of @ref ICACHE_Traffic_Route */
-
-  uint32_t OutputBurstType;          /*!< Selects the output burst type.
-                                          This parameter can be a value of @ref ICACHE_Output_Burst_Type */
-} ICACHE_RegionConfigTypeDef;
-/**
-  * @}
-  */
-#endif /*  ICACHE_CRRx_REN */
-
-/* Exported constants -------------------------------------------------------*/
-/** @defgroup ICACHE_Exported_Constants ICACHE Exported Constants
-  * @{
-  */
-
-/** @defgroup ICACHE_WaysSelection Ways selection
-  * @{
-  */
-#define ICACHE_1WAY                    0U                /*!< 1-way cache (direct mapped cache) */
-#define ICACHE_2WAYS                   ICACHE_CR_WAYSEL  /*!< 2-ways set associative cache (default) */
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_Monitor_Type Monitor type
-  * @{
-  */
-#define ICACHE_MONITOR_HIT_MISS        (ICACHE_CR_HITMEN | ICACHE_CR_MISSMEN) /*!< Hit & Miss monitoring */
-#define ICACHE_MONITOR_HIT             ICACHE_CR_HITMEN                       /*!< Hit monitoring */
-#define ICACHE_MONITOR_MISS            ICACHE_CR_MISSMEN                      /*!< Miss monitoring */
-/**
-  * @}
-  */
-
-#if defined(ICACHE_CRRx_REN)
-/** @defgroup ICACHE_Region Remapped Region number
-  * @{
-  */
-#define ICACHE_REGION_0                0U  /*!< Region 0 */
-#define ICACHE_REGION_1                1U  /*!< Region 1 */
-#define ICACHE_REGION_2                2U  /*!< Region 2 */
-#define ICACHE_REGION_3                3U  /*!< Region 3 */
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_Region_Size Remapped Region size
-  * @{
-  */
-#define ICACHE_REGIONSIZE_2MB          1U  /*!< Region size 2MB */
-#define ICACHE_REGIONSIZE_4MB          2U  /*!< Region size 4MB */
-#define ICACHE_REGIONSIZE_8MB          3U  /*!< Region size 8MB */
-#define ICACHE_REGIONSIZE_16MB         4U  /*!< Region size 16MB */
-#define ICACHE_REGIONSIZE_32MB         5U  /*!< Region size 32MB */
-#define ICACHE_REGIONSIZE_64MB         6U  /*!< Region size 64MB */
-#define ICACHE_REGIONSIZE_128MB        7U  /*!< Region size 128MB */
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_Traffic_Route Remapped Traffic route
-  * @{
-  */
-#define ICACHE_MASTER1_PORT            0U                  /*!< Master1 port */
-#define ICACHE_MASTER2_PORT            ICACHE_CRRx_MSTSEL  /*!< Master2 port */
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_Output_Burst_Type Remapped Output burst type
-  * @{
-  */
-#define ICACHE_OUTPUT_BURST_WRAP       0U                  /*!< WRAP */
-#define ICACHE_OUTPUT_BURST_INCR       ICACHE_CRRx_HBURST  /*!< INCR */
-/**
-  * @}
-  */
-#endif /*  ICACHE_CRRx_REN */
-
-/** @defgroup ICACHE_Interrupts Interrupts
-  * @{
-  */
-#define ICACHE_IT_BUSYEND              ICACHE_IER_BSYENDIE /*!< Busy end interrupt */
-#define ICACHE_IT_ERROR                ICACHE_IER_ERRIE    /*!< Cache error interrupt */
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_Flags Flags
-  * @{
-  */
-#define ICACHE_FLAG_BUSY               ICACHE_SR_BUSYF     /*!< Busy flag */
-#define ICACHE_FLAG_BUSYEND            ICACHE_SR_BSYENDF   /*!< Busy end flag */
-#define ICACHE_FLAG_ERROR              ICACHE_SR_ERRF      /*!< Cache error flag */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macros ----------------------------------------------------------*/
-/** @defgroup ICACHE_Exported_Macros ICACHE Exported Macros
-  * @{
-  */
-
-/** @defgroup ICACHE_Flags_Interrupts_Management Flags and Interrupts Management
-  * @brief macros to manage the specified ICACHE flags and interrupts.
-  * @{
-  */
-
-/** @brief  Enable ICACHE interrupts.
-  * @param  __INTERRUPT__ specifies the ICACHE interrupt sources to be enabled.
-  *         This parameter can be any combination of the following values:
-  *            @arg @ref ICACHE_IT_BUSYEND  Busy end interrupt
-  *            @arg @ref ICACHE_IT_ERROR  Cache error interrupt
-  */
-#define __HAL_ICACHE_ENABLE_IT(__INTERRUPT__) SET_BIT(ICACHE->IER, (__INTERRUPT__))
-
-/** @brief  Disable ICACHE interrupts.
-  * @param  __INTERRUPT__ specifies the ICACHE interrupt sources to be disabled.
-  *         This parameter can be any combination of the following values:
-  *            @arg @ref ICACHE_IT_BUSYEND  Busy end interrupt
-  *            @arg @ref ICACHE_IT_ERROR  Cache error interrupt
-  */
-#define __HAL_ICACHE_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(ICACHE->IER, (__INTERRUPT__))
-
-/** @brief  Check whether the specified ICACHE interrupt source is enabled or not.
-  * @param  __INTERRUPT__ specifies the ICACHE interrupt source to check.
-  *         This parameter can be any combination of the following values:
-  *            @arg @ref ICACHE_IT_BUSYEND  Busy end interrupt
-  *            @arg @ref ICACHE_IT_ERROR  Cache error interrupt
-  * @retval The state of __INTERRUPT__ (0 or 1).
-  */
-#define __HAL_ICACHE_GET_IT_SOURCE(__INTERRUPT__)  \
-  ((READ_BIT(ICACHE->IER, (__INTERRUPT__)) == (__INTERRUPT__)) ? 1U : 0U)
-
-/** @brief  Check whether the selected ICACHE flag is set or not.
-  * @param  __FLAG__ specifies the flag to check.
-  *         This parameter can be one of the following values:
-  *            @arg @ref ICACHE_FLAG_BUSY  Busy flag
-  *            @arg @ref ICACHE_FLAG_BUSYEND  Busy end flag
-  *            @arg @ref ICACHE_FLAG_ERROR  Cache error flag
-  * @retval The state of __FLAG__ (0 or 1).
-  */
-#define __HAL_ICACHE_GET_FLAG(__FLAG__) ((READ_BIT(ICACHE->SR, (__FLAG__)) != 0U) ? 1U : 0U)
-
-/** @brief  Clear the selected ICACHE flags.
-  * @param  __FLAG__ specifies the ICACHE flags to clear.
-  *         This parameter can be any combination of the following values:
-  *            @arg @ref ICACHE_FLAG_BUSYEND  Busy end flag
-  *            @arg @ref ICACHE_FLAG_ERROR  Cache error flag
-  */
-#define __HAL_ICACHE_CLEAR_FLAG(__FLAG__) WRITE_REG(ICACHE->FCR, (__FLAG__))
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions -------------------------------------------------------*/
-/** @addtogroup ICACHE_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup ICACHE_Exported_Functions_Group1
-  * @brief    Initialization and control functions
-  * @{
-  */
-/* Peripheral Control functions **********************************************/
-HAL_StatusTypeDef HAL_ICACHE_Enable(void);
-HAL_StatusTypeDef HAL_ICACHE_Disable(void);
-uint32_t HAL_ICACHE_IsEnabled(void);
-HAL_StatusTypeDef HAL_ICACHE_ConfigAssociativityMode(uint32_t AssociativityMode);
-HAL_StatusTypeDef HAL_ICACHE_DeInit(void);
-
-/******* Invalidate in blocking mode (Polling) */
-HAL_StatusTypeDef HAL_ICACHE_Invalidate(void);
-/******* Invalidate in non-blocking mode (Interrupt) */
-HAL_StatusTypeDef HAL_ICACHE_Invalidate_IT(void);
-/******* Wait for Invalidate complete in blocking mode (Polling) */
-HAL_StatusTypeDef HAL_ICACHE_WaitForInvalidateComplete(void);
-
-/******* Performance instruction cache monitoring functions */
-HAL_StatusTypeDef HAL_ICACHE_Monitor_Start(uint32_t MonitorType);
-HAL_StatusTypeDef HAL_ICACHE_Monitor_Stop(uint32_t MonitorType);
-HAL_StatusTypeDef HAL_ICACHE_Monitor_Reset(uint32_t MonitorType);
-uint32_t HAL_ICACHE_Monitor_GetHitValue(void);
-uint32_t HAL_ICACHE_Monitor_GetMissValue(void);
-
-/**
-  * @}
-  */
-
-/** @addtogroup ICACHE_Exported_Functions_Group2
-  * @brief    IRQ and callback functions
-  * @{
-  */
-/******* IRQHandler and Callbacks used in non-blocking mode (Interrupt) */
-void HAL_ICACHE_IRQHandler(void);
-void HAL_ICACHE_InvalidateCompleteCallback(void);
-void HAL_ICACHE_ErrorCallback(void);
-
-/**
-  * @}
-  */
-
-#if defined(ICACHE_CRRx_REN)
-/** @addtogroup ICACHE_Exported_Functions_Group3
-  * @brief    Memory remapped regions functions
-  * @{
-  */
-/******* Memory remapped regions functions */
-HAL_StatusTypeDef HAL_ICACHE_EnableRemapRegion(uint32_t Region, const ICACHE_RegionConfigTypeDef *const pRegionConfig);
-HAL_StatusTypeDef HAL_ICACHE_DisableRemapRegion(uint32_t Region);
-
-/**
-  * @}
-  */
-#endif /*  ICACHE_CRRx_REN */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* ICACHE */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* STM32H5xx_HAL_ICACHE_H */

Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_uart_ex.h

@@ -0,0 +1,437 @@
+/**
+  ******************************************************************************
+  * @file    stm32h5xx_hal_uart_ex.h
+  * @author  MCD Application Team
+  * @brief   Header file of UART HAL Extended module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32H5xx_HAL_UART_EX_H
+#define STM32H5xx_HAL_UART_EX_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32h5xx_hal_def.h"
+
+/** @addtogroup STM32H5xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup UARTEx
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup UARTEx_Exported_Types UARTEx Exported Types
+  * @{
+  */
+
+/**
+  * @brief  UART wake up from stop mode parameters
+  */
+typedef struct
+{
+  uint32_t WakeUpEvent;        /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF).
+                                    This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
+                                    If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
+                                    be filled up. */
+
+  uint16_t AddressLength;      /*!< Specifies whether the address is 4 or 7-bit long.
+                                    This parameter can be a value of @ref UARTEx_WakeUp_Address_Length.  */
+
+  uint8_t Address;             /*!< UART/USART node address (7-bit long max). */
+} UART_WakeUpTypeDef;
+
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
+  * @{
+  */
+
+/** @defgroup UARTEx_Word_Length UARTEx Word Length
+  * @{
+  */
+#define UART_WORDLENGTH_7B          USART_CR1_M1   /*!< 7-bit long UART frame */
+#define UART_WORDLENGTH_8B          0x00000000U    /*!< 8-bit long UART frame */
+#define UART_WORDLENGTH_9B          USART_CR1_M0   /*!< 9-bit long UART frame */
+/**
+  * @}
+  */
+
+/** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length
+  * @{
+  */
+#define UART_ADDRESS_DETECT_4B      0x00000000U      /*!< 4-bit long wake-up address */
+#define UART_ADDRESS_DETECT_7B      USART_CR2_ADDM7  /*!< 7-bit long wake-up address */
+/**
+  * @}
+  */
+
+/** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode
+  * @brief    UART FIFO mode
+  * @{
+  */
+#define UART_FIFOMODE_DISABLE       0x00000000U       /*!< FIFO mode disable */
+#define UART_FIFOMODE_ENABLE        USART_CR1_FIFOEN  /*!< FIFO mode enable  */
+/**
+  * @}
+  */
+
+/** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level
+  * @brief    UART TXFIFO threshold level
+  * @{
+  */
+#define UART_TXFIFO_THRESHOLD_1_8   0x00000000U                               /*!< TX FIFO reaches 1/8 of its depth */
+#define UART_TXFIFO_THRESHOLD_1_4   USART_CR3_TXFTCFG_0                       /*!< TX FIFO reaches 1/4 of its depth */
+#define UART_TXFIFO_THRESHOLD_1_2   USART_CR3_TXFTCFG_1                       /*!< TX FIFO reaches 1/2 of its depth */
+#define UART_TXFIFO_THRESHOLD_3_4   (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */
+#define UART_TXFIFO_THRESHOLD_7_8   USART_CR3_TXFTCFG_2                       /*!< TX FIFO reaches 7/8 of its depth */
+#define UART_TXFIFO_THRESHOLD_8_8   (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty            */
+/**
+  * @}
+  */
+
+/** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level
+  * @brief    UART RXFIFO threshold level
+  * @{
+  */
+#define UART_RXFIFO_THRESHOLD_1_8   0x00000000U                               /*!< RX FIFO reaches 1/8 of its depth */
+#define UART_RXFIFO_THRESHOLD_1_4   USART_CR3_RXFTCFG_0                       /*!< RX FIFO reaches 1/4 of its depth */
+#define UART_RXFIFO_THRESHOLD_1_2   USART_CR3_RXFTCFG_1                       /*!< RX FIFO reaches 1/2 of its depth */
+#define UART_RXFIFO_THRESHOLD_3_4   (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */
+#define UART_RXFIFO_THRESHOLD_7_8   USART_CR3_RXFTCFG_2                       /*!< RX FIFO reaches 7/8 of its depth */
+#define UART_RXFIFO_THRESHOLD_8_8   (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full             */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macros -----------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+/** @addtogroup UARTEx_Exported_Functions
+  * @{
+  */
+
+/** @addtogroup UARTEx_Exported_Functions_Group1
+  * @{
+  */
+
+/* Initialization and de-initialization functions  ****************************/
+HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime,
+                                   uint32_t DeassertionTime);
+
+/**
+  * @}
+  */
+
+/** @addtogroup UARTEx_Exported_Functions_Group2
+  * @{
+  */
+
+void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
+
+void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart);
+void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart);
+
+/**
+  * @}
+  */
+
+/** @addtogroup UARTEx_Exported_Functions_Group3
+  * @{
+  */
+
+/* Peripheral Control functions  **********************************************/
+HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
+HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
+HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
+
+HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
+
+HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart);
+HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart);
+HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
+HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
+
+HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
+                                           uint32_t Timeout);
+HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
+#if defined(HAL_DMA_MODULE_ENABLED)
+HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart);
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup UARTEx_Private_Macros UARTEx Private Macros
+  * @{
+  */
+
+/** @brief  Report the UART clock source.
+  * @param  __HANDLE__ specifies the UART Handle.
+  * @param  __CLOCKSOURCE__ output variable.
+  * @retval UART clocking source, written in __CLOCKSOURCE__.
+  */
+#if (defined(STM32H573xx) || defined(STM32H563xx) || defined(STM32H562xx))
+#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__)           \
+  do {                                                            \
+    if((__HANDLE__)->Instance == USART1)                          \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART1;         \
+    }                                                             \
+    else if((__HANDLE__)->Instance == USART2)                     \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART2;         \
+    }                                                             \
+    else if((__HANDLE__)->Instance == USART3)                     \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART3;         \
+    }                                                             \
+    else if((__HANDLE__)->Instance == UART4)                      \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART4;          \
+    }                                                             \
+    else if((__HANDLE__)->Instance == UART5)                      \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART5;          \
+    }                                                             \
+    else if((__HANDLE__)->Instance == USART6)                     \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART6;         \
+    }                                                             \
+    else if((__HANDLE__)->Instance == UART7)                      \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART7;          \
+    }                                                             \
+    else if((__HANDLE__)->Instance == UART8)                      \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART8;          \
+    }                                                             \
+    else if((__HANDLE__)->Instance == UART9)                      \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART9;          \
+    }                                                             \
+    else if((__HANDLE__)->Instance == USART10)                    \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART10;        \
+    }                                                             \
+    else if((__HANDLE__)->Instance == USART11)                    \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART11;        \
+    }                                                             \
+    else if((__HANDLE__)->Instance == UART12)                     \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART12;         \
+    }                                                             \
+    else if((__HANDLE__)->Instance == LPUART1)                    \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_LPUART1;        \
+    }                                                             \
+    else                                                          \
+    {                                                             \
+      (__CLOCKSOURCE__) = 0U;                                     \
+    }                                                             \
+  } while(0U)
+#elif (defined(STM32H523xx) || defined(STM32H533xx))
+#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__)           \
+  do {                                                            \
+    if((__HANDLE__)->Instance == USART1)                          \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART1;         \
+    }                                                             \
+    else if((__HANDLE__)->Instance == USART2)                     \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART2;         \
+    }                                                             \
+    else if((__HANDLE__)->Instance == USART3)                     \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART3;         \
+    }                                                             \
+    else if((__HANDLE__)->Instance == UART4)                      \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART4;          \
+    }                                                             \
+    else if((__HANDLE__)->Instance == UART5)                      \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART5;          \
+    }                                                             \
+    else if((__HANDLE__)->Instance == USART6)                     \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART6;         \
+    }                                                             \
+    else if((__HANDLE__)->Instance == LPUART1)                    \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_LPUART1;        \
+    }                                                             \
+    else                                                          \
+    {                                                             \
+      (__CLOCKSOURCE__) = 0U;                                     \
+    }                                                             \
+  } while(0U)
+#else
+#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__)           \
+  do {                                                            \
+    if((__HANDLE__)->Instance == USART1)                          \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART1;         \
+    }                                                             \
+    else if((__HANDLE__)->Instance == USART2)                     \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART2;         \
+    }                                                             \
+    else if((__HANDLE__)->Instance == USART3)                     \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART3;         \
+    }                                                             \
+    else if((__HANDLE__)->Instance == LPUART1)                    \
+    {                                                             \
+      (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_LPUART1;        \
+    }                                                             \
+    else                                                          \
+    {                                                             \
+      (__CLOCKSOURCE__) = 0U;                                     \
+    }                                                             \
+  } while(0U)
+#endif /* (defined(STM32H573xx) || defined(STM32H563xx) || defined(STM32H562xx) */
+
+
+/** @brief  Report the UART mask to apply to retrieve the received data
+  *         according to the word length and to the parity bits activation.
+  * @note   If PCE = 1, the parity bit is not included in the data extracted
+  *         by the reception API().
+  *         This masking operation is not carried out in the case of
+  *         DMA transfers.
+  * @param  __HANDLE__ specifies the UART Handle.
+  * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
+  */
+#define UART_MASK_COMPUTATION(__HANDLE__)                             \
+  do {                                                                \
+    if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B)          \
+    {                                                                 \
+      if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE)              \
+      {                                                               \
+        (__HANDLE__)->Mask = 0x01FFU ;                                \
+      }                                                               \
+      else                                                            \
+      {                                                               \
+        (__HANDLE__)->Mask = 0x00FFU ;                                \
+      }                                                               \
+    }                                                                 \
+    else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B)     \
+    {                                                                 \
+      if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE)              \
+      {                                                               \
+        (__HANDLE__)->Mask = 0x00FFU ;                                \
+      }                                                               \
+      else                                                            \
+      {                                                               \
+        (__HANDLE__)->Mask = 0x007FU ;                                \
+      }                                                               \
+    }                                                                 \
+    else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B)     \
+    {                                                                 \
+      if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE)              \
+      {                                                               \
+        (__HANDLE__)->Mask = 0x007FU ;                                \
+      }                                                               \
+      else                                                            \
+      {                                                               \
+        (__HANDLE__)->Mask = 0x003FU ;                                \
+      }                                                               \
+    }                                                                 \
+    else                                                              \
+    {                                                                 \
+      (__HANDLE__)->Mask = 0x0000U;                                   \
+    }                                                                 \
+  } while(0U)
+
+/**
+  * @brief Ensure that UART frame length is valid.
+  * @param __LENGTH__ UART frame length.
+  * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
+  */
+#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \
+                                         ((__LENGTH__) == UART_WORDLENGTH_8B) || \
+                                         ((__LENGTH__) == UART_WORDLENGTH_9B))
+
+/**
+  * @brief Ensure that UART wake-up address length is valid.
+  * @param __ADDRESS__ UART wake-up address length.
+  * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
+  */
+#define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
+                                                   ((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
+
+/**
+  * @brief Ensure that UART TXFIFO threshold level is valid.
+  * @param __THRESHOLD__ UART TXFIFO threshold level.
+  * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
+  */
+#define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \
+                                                 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \
+                                                 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \
+                                                 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \
+                                                 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \
+                                                 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8))
+
+/**
+  * @brief Ensure that UART RXFIFO threshold level is valid.
+  * @param __THRESHOLD__ UART RXFIFO threshold level.
+  * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
+  */
+#define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \
+                                                 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \
+                                                 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \
+                                                 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \
+                                                 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \
+                                                 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8))
+
+/**
+  * @}
+  */
+
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32H5xx_HAL_UART_EX_H */
+

Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_icache.h

@@ -1,788 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32h5xx_ll_icache.h
-  * @author  MCD Application Team
-  * @brief   Header file of ICACHE LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2023 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion ------------------------------------*/
-#ifndef STM32H5xx_LL_ICACHE_H
-#define STM32H5xx_LL_ICACHE_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes -----------------------------------------------------------------*/
-#include "stm32h5xx.h"
-
-/** @addtogroup STM32H5xx_LL_Driver
-  * @{
-  */
-
-#if defined(ICACHE)
-
-/** @defgroup ICACHE_LL ICACHE
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
-#if defined(ICACHE_CRRx_REN)
-/** @defgroup ICACHE_LL_REGION_CONFIG ICACHE Exported Configuration structure
-  * @{
-  */
-
-/**
-  * @brief  LL ICACHE region configuration structure definition
-  */
-typedef struct
-{
-  uint32_t BaseAddress;              /*!< Configures the C-AHB base address to be remapped */
-
-  uint32_t RemapAddress;             /*!< Configures the remap address to be remapped */
-
-  uint32_t Size;                     /*!< Configures the region size.
-                                          This parameter can be a value of @ref ICACHE_LL_EC_Region_Size */
-
-  uint32_t TrafficRoute;             /*!< Selects the traffic route.
-                                          This parameter can be a value of @ref ICACHE_LL_EC_Traffic_Route */
-
-  uint32_t OutputBurstType;          /*!< Selects the output burst type.
-                                          This parameter can be a value of @ref ICACHE_LL_EC_Output_Burst_Type */
-} LL_ICACHE_RegionTypeDef;
-
-/**
-  * @}
-  */
-#endif /*  ICACHE_CRRx_REN */
-
-/* Exported constants -------------------------------------------------------*/
-/** @defgroup ICACHE_LL_Exported_Constants ICACHE Exported Constants
-  * @{
-  */
-
-/** @defgroup ICACHE_LL_EC_WaysSelection Ways selection
-  * @{
-  */
-#define LL_ICACHE_1WAY                 0U                /*!< 1-way cache (direct mapped cache) */
-#define LL_ICACHE_2WAYS                ICACHE_CR_WAYSEL  /*!< 2-ways set associative cache (default) */
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_LL_EC_Monitor_Type Monitor type
-  * @{
-  */
-#define LL_ICACHE_MONITOR_HIT          ICACHE_CR_HITMEN                       /*!< Hit monitor counter */
-#define LL_ICACHE_MONITOR_MISS         ICACHE_CR_MISSMEN                      /*!< Miss monitor counter */
-#define LL_ICACHE_MONITOR_ALL          (ICACHE_CR_HITMEN | ICACHE_CR_MISSMEN) /*!< All monitors counters */
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_ICACHE_ReadReg function
-  * @{
-  */
-#define LL_ICACHE_SR_BUSYF             ICACHE_SR_BUSYF     /*!< Busy flag */
-#define LL_ICACHE_SR_BSYENDF           ICACHE_SR_BSYENDF   /*!< Busy end flag */
-#define LL_ICACHE_SR_ERRF              ICACHE_SR_ERRF      /*!< Cache error flag */
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_LL_EC_CLEAR_FLAG Clear Flags Defines
-  * @brief    Flags defines which can be used with LL_ICACHE_WriteReg function
-  * @{
-  */
-#define LL_ICACHE_FCR_CBSYENDF         ICACHE_FCR_CBSYENDF /*!< Busy end flag */
-#define LL_ICACHE_FCR_CERRF            ICACHE_FCR_CERRF    /*!< Cache error flag */
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_ICACHE_ReadReg and  LL_ICACHE_WriteReg functions
-  * @{
-  */
-#define LL_ICACHE_IER_BSYENDIE         ICACHE_IER_BSYENDIE /*!< Busy end interrupt */
-#define LL_ICACHE_IER_ERRIE            ICACHE_IER_ERRIE    /*!< Cache error interrupt */
-/**
-  * @}
-  */
-
-#if defined(ICACHE_CRRx_REN)
-/** @defgroup ICACHE_LL_EC_Region Remapped Region number
-  * @{
-  */
-#define LL_ICACHE_REGION_0             0U  /*!< Region 0 */
-#define LL_ICACHE_REGION_1             1U  /*!< Region 1 */
-#define LL_ICACHE_REGION_2             2U  /*!< Region 2 */
-#define LL_ICACHE_REGION_3             3U  /*!< Region 3 */
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_LL_EC_Region_Size Remapped Region size
-  * @{
-  */
-#define LL_ICACHE_REGIONSIZE_2MB       1U  /*!< Region size 2MB */
-#define LL_ICACHE_REGIONSIZE_4MB       2U  /*!< Region size 4MB */
-#define LL_ICACHE_REGIONSIZE_8MB       3U  /*!< Region size 8MB */
-#define LL_ICACHE_REGIONSIZE_16MB      4U  /*!< Region size 16MB */
-#define LL_ICACHE_REGIONSIZE_32MB      5U  /*!< Region size 32MB */
-#define LL_ICACHE_REGIONSIZE_64MB      6U  /*!< Region size 64MB */
-#define LL_ICACHE_REGIONSIZE_128MB     7U  /*!< Region size 128MB */
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_LL_EC_Traffic_Route Remapped Traffic route
-  * @{
-  */
-#define LL_ICACHE_MASTER1_PORT         0U                  /*!< Master1 port */
-#define LL_ICACHE_MASTER2_PORT         ICACHE_CRRx_MSTSEL  /*!< Master2 port */
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_LL_EC_Output_Burst_Type Remapped Output burst type
-  * @{
-  */
-#define LL_ICACHE_OUTPUT_BURST_WRAP    0U                  /*!< WRAP */
-#define LL_ICACHE_OUTPUT_BURST_INCR    ICACHE_CRRx_HBURST  /*!< INCR */
-/**
-  * @}
-  */
-#endif /*  ICACHE_CRRx_REN */
-
-/**
-  * @}
-  */
-
-/* Exported macros ----------------------------------------------------------*/
-/** @defgroup ICACHE_LL_Exported_Macros ICACHE Exported Macros
-  * @{
-  */
-
-/** @defgroup ICACHE_LL_EM_WRITE_READ Common write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in ICACHE register
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_ICACHE_WriteReg(__REG__, __VALUE__) WRITE_REG(ICACHE->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in ICACHE register
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_ICACHE_ReadReg(__REG__) READ_REG(ICACHE->__REG__)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup ICACHE_LL_Exported_Functions ICACHE Exported Functions
-  * @{
-  */
-
-/** @defgroup ICACHE_LL_EF_Configuration Configuration
-  * @{
-  */
-
-/**
-  * @brief  Enable the ICACHE.
-  * @rmtoll CR           EN            LL_ICACHE_Enable
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_Enable(void)
-{
-  SET_BIT(ICACHE->CR, ICACHE_CR_EN);
-}
-
-/**
-  * @brief  Disable the ICACHE.
-  * @rmtoll CR           EN            LL_ICACHE_Disable
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_Disable(void)
-{
-  CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN);
-}
-
-/**
-  * @brief  Return if ICACHE is enabled or not.
-  * @rmtoll CR           EN            LL_ICACHE_IsEnabled
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_IsEnabled(void)
-{
-  return ((READ_BIT(ICACHE->CR, ICACHE_CR_EN) == (ICACHE_CR_EN)) ? 1UL : 0UL);
-}
-
-/**
-  * @brief  Select the ICACHE operating mode.
-  * @rmtoll CR           WAYSEL        LL_ICACHE_SetMode
-  * @param  Mode This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_1WAY
-  *         @arg @ref LL_ICACHE_2WAYS
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_SetMode(uint32_t Mode)
-{
-  MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, Mode);
-}
-
-/**
-  * @brief  Get the selected ICACHE operating mode.
-  * @rmtoll CR           WAYSEL        LL_ICACHE_GetMode
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ICACHE_1WAY
-  *         @arg @ref LL_ICACHE_2WAYS
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_GetMode(void)
-{
-  return (READ_BIT(ICACHE->CR, ICACHE_CR_WAYSEL));
-}
-
-/**
-  * @brief  Invalidate the ICACHE.
-  * @note   Until the BSYEND flag is set, the cache is bypassed.
-  * @rmtoll CR           CACHEINV      LL_ICACHE_Invalidate
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_Invalidate(void)
-{
-  SET_BIT(ICACHE->CR, ICACHE_CR_CACHEINV);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_LL_EF_Monitors Monitors
-  * @{
-  */
-
-/**
-  * @brief  Enable the hit/miss monitor(s).
-  * @rmtoll CR           HITMEN        LL_ICACHE_EnableMonitors
-  * @rmtoll CR           MISSMEN       LL_ICACHE_EnableMonitors
-  * @param  Monitors This parameter can be one or a combination of the following values:
-  *         @arg @ref LL_ICACHE_MONITOR_HIT
-  *         @arg @ref LL_ICACHE_MONITOR_MISS
-  *         @arg @ref LL_ICACHE_MONITOR_ALL
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_EnableMonitors(uint32_t Monitors)
-{
-  SET_BIT(ICACHE->CR, Monitors);
-}
-
-/**
-  * @brief  Disable the hit/miss monitor(s).
-  * @rmtoll CR           HITMEN        LL_ICACHE_DisableMonitors
-  * @rmtoll CR           MISSMEN       LL_ICACHE_DisableMonitors
-  * @param  Monitors This parameter can be one or a combination of the following values:
-  *         @arg @ref LL_ICACHE_MONITOR_HIT
-  *         @arg @ref LL_ICACHE_MONITOR_MISS
-  *         @arg @ref LL_ICACHE_MONITOR_ALL
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_DisableMonitors(uint32_t Monitors)
-{
-  CLEAR_BIT(ICACHE->CR, Monitors);
-}
-
-/**
-  * @brief  Check if the monitor(s) is(are) enabled or disabled.
-  * @rmtoll CR           HITMEN        LL_ICACHE_IsEnabledMonitors
-  * @rmtoll CR           MISSMEN       LL_ICACHE_IsEnabledMonitors
-  * @param  Monitors This parameter can be one or a combination of the following values:
-  *         @arg @ref LL_ICACHE_MONITOR_HIT
-  *         @arg @ref LL_ICACHE_MONITOR_MISS
-  *         @arg @ref LL_ICACHE_MONITOR_ALL
-  * @retval State of parameter value (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_IsEnabledMonitors(uint32_t Monitors)
-{
-  return ((READ_BIT(ICACHE->CR, Monitors) == (Monitors)) ? 1UL : 0UL);
-}
-
-/**
-  * @brief  Reset the hit/miss monitor(s).
-  * @rmtoll CR           HITMRST       LL_ICACHE_ResetMonitors
-  * @rmtoll CR           MISSMRST      LL_ICACHE_ResetMonitors
-  * @param  Monitors This parameter can be one or a combination of the following values:
-  *         @arg @ref LL_ICACHE_MONITOR_HIT
-  *         @arg @ref LL_ICACHE_MONITOR_MISS
-  *         @arg @ref LL_ICACHE_MONITOR_ALL
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_ResetMonitors(uint32_t Monitors)
-{
-  /* Reset */
-  SET_BIT(ICACHE->CR, (Monitors << 2U));
-  /* Release reset */
-  CLEAR_BIT(ICACHE->CR, (Monitors << 2U));
-}
-
-/**
-  * @brief  Get the Hit monitor.
-  * @note   Upon reaching the 32-bit maximum value, hit monitor does not wrap.
-  * @rmtoll HMONR        HITMON        LL_ICACHE_GetHitMonitor
-  * @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_GetHitMonitor(void)
-{
-  return (ICACHE->HMONR);
-}
-
-/**
-  * @brief  Get the Miss monitor.
-  * @note   Upon reaching the 16-bit maximum value, miss monitor does not wrap.
-  * @rmtoll MMONR        MISSMON       LL_ICACHE_GetMissMonitor
-  * @retval Value between Min_Data=0 and Max_Data=0xFFFF
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_GetMissMonitor(void)
-{
-  return (ICACHE->MMONR);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_LL_EF_IT_Management IT_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable BSYEND interrupt.
-  * @rmtoll IER          BSYENDIE      LL_ICACHE_EnableIT_BSYEND
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_EnableIT_BSYEND(void)
-{
-  SET_BIT(ICACHE->IER, ICACHE_IER_BSYENDIE);
-}
-
-/**
-  * @brief  Disable BSYEND interrupt.
-  * @rmtoll IER          BSYENDIE      LL_ICACHE_DisableIT_BSYEND
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_DisableIT_BSYEND(void)
-{
-  CLEAR_BIT(ICACHE->IER, ICACHE_IER_BSYENDIE);
-}
-
-/**
-  * @brief  Check if the BSYEND Interrupt is enabled or disabled.
-  * @rmtoll IER          BSYENDIE      LL_ICACHE_IsEnabledIT_BSYEND
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_IsEnabledIT_BSYEND(void)
-{
-  return ((READ_BIT(ICACHE->IER, ICACHE_IER_BSYENDIE) == (ICACHE_IER_BSYENDIE)) ? 1UL : 0UL);
-}
-
-/**
-  * @brief  Enable ERR interrupt.
-  * @rmtoll IER          ERRIE         LL_ICACHE_EnableIT_ERR
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_EnableIT_ERR(void)
-{
-  SET_BIT(ICACHE->IER, ICACHE_IER_ERRIE);
-}
-
-/**
-  * @brief  Disable ERR interrupt.
-  * @rmtoll IER          ERRIE        LL_ICACHE_DisableIT_ERR
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_DisableIT_ERR(void)
-{
-  CLEAR_BIT(ICACHE->IER, ICACHE_IER_ERRIE);
-}
-
-/**
-  * @brief  Check if the ERR Interrupt is enabled or disabled.
-  * @rmtoll IER          ERRIE         LL_ICACHE_IsEnabledIT_ERR
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_IsEnabledIT_ERR(void)
-{
-  return ((READ_BIT(ICACHE->IER, ICACHE_IER_ERRIE) == (ICACHE_IER_ERRIE)) ? 1UL : 0UL);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_LL_EF_FLAG_Management FLAG_Management
-  * @{
-  */
-
-/**
-  * @brief  Indicate the status of an ongoing operation flag.
-  * @rmtoll SR           BUSYF         LL_ICACHE_IsActiveFlag_BUSY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_IsActiveFlag_BUSY(void)
-{
-  return ((READ_BIT(ICACHE->SR, ICACHE_SR_BUSYF) == (ICACHE_SR_BUSYF)) ? 1UL : 0UL);
-}
-
-/**
-  * @brief  Indicate the status of an operation end flag.
-  * @rmtoll SR           BSYEND       LL_ICACHE_IsActiveFlag_BSYEND
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_IsActiveFlag_BSYEND(void)
-{
-  return ((READ_BIT(ICACHE->SR, ICACHE_SR_BSYENDF) == (ICACHE_SR_BSYENDF)) ? 1UL : 0UL);
-}
-
-/**
-  * @brief  Indicate the status of an error flag.
-  * @rmtoll SR           ERRF          LL_ICACHE_IsActiveFlag_ERR
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_IsActiveFlag_ERR(void)
-{
-  return ((READ_BIT(ICACHE->SR, ICACHE_SR_ERRF) == (ICACHE_SR_ERRF)) ? 1UL : 0UL);
-}
-
-/**
-  * @brief  Clear busy end of operation flag.
-  * @rmtoll FCR          CBSYENDF      LL_ICACHE_ClearFlag_BSYEND
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_ClearFlag_BSYEND(void)
-{
-  WRITE_REG(ICACHE->FCR, ICACHE_FCR_CBSYENDF);
-}
-
-/**
-  * @brief  Clear error flag.
-  * @rmtoll FCR          ERRF          LL_ICACHE_ClearFlag_ERR
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_ClearFlag_ERR(void)
-{
-  WRITE_REG(ICACHE->FCR, ICACHE_FCR_CERRF);
-}
-
-/**
-  * @}
-  */
-
-#if defined(ICACHE_CRRx_REN)
-/** @defgroup ICACHE_LL_EF_REGION_Management REGION_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable the remapped memory region.
-  * @note   The region must have been already configured.
-  * @rmtoll CRRx         REN           LL_ICACHE_EnableRegion
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_EnableRegion(uint32_t Region)
-{
-  SET_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-          ICACHE_CRRx_REN);
-}
-
-/**
-  * @brief  Disable the remapped memory region.
-  * @rmtoll CRRx         REN           LL_ICACHE_DisableRegion
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_DisableRegion(uint32_t Region)
-{
-  CLEAR_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-            ICACHE_CRRx_REN);
-}
-
-/**
-  * @brief  Return if remapped memory region is enabled or not.
-  * @rmtoll CRRx         REN           LL_ICACHE_IsEnabledRegion
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_IsEnabledRegion(uint32_t Region)
-{
-  return ((READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-                    ICACHE_CRRx_REN) == (ICACHE_CRRx_REN)) ? 1UL : 0UL);
-}
-
-/**
-  * @brief  Select the memory remapped region base address.
-  * @note   The useful bits depends on RSIZE as described in the Reference Manual.
-  * @rmtoll CRRx         BASEADDR      LL_ICACHE_SetRegionBaseAddress
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @param  Address  Alias address in the Code region
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_SetRegionBaseAddress(uint32_t Region, uint32_t Address)
-{
-  MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-             ICACHE_CRRx_BASEADDR, ((Address & 0x1FFFFFFFU) >> 21U));
-}
-
-/**
-  * @brief  Get the memory remapped region base address.
-  * @note   The base address is the alias in the Code region.
-  * @note   The useful bits depends on RSIZE as described in the Reference Manual.
-  * @rmtoll CRRx         BASEADDR      LL_ICACHE_GetRegionBaseAddress
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @retval Address  Alias address in the Code region
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_GetRegionBaseAddress(uint32_t Region)
-{
-  return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-                   ICACHE_CRRx_BASEADDR) << 21U);
-}
-
-/**
-  * @brief  Select the memory remapped region address.
-  * @note   The useful bits depends on RSIZE as described in the Reference Manual.
-  * @rmtoll CRRx         REMAPADDR     LL_ICACHE_SetRegionRemapAddress
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @param  Address  Memory address to remap
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_SetRegionRemapAddress(uint32_t Region, uint32_t Address)
-{
-  MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-             ICACHE_CRRx_REMAPADDR, ((Address >> 21U) << ICACHE_CRRx_REMAPADDR_Pos));
-}
-
-/**
-  * @brief  Get the memory remapped region address.
-  * @note   The useful bits depends on RSIZE as described in the Reference Manual.
-  * @rmtoll CRRx         REMAPADDR     LL_ICACHE_GetRegionRemapAddress
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @retval Address  Remapped memory address
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_GetRegionRemapAddress(uint32_t Region)
-{
-  return ((READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-                    ICACHE_CRRx_REMAPADDR) >> ICACHE_CRRx_REMAPADDR_Pos) << 21U);
-}
-
-/**
-  * @brief  Select the memory remapped region size.
-  * @rmtoll CRRx         RSIZE         LL_ICACHE_SetRegionSize
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @param  Size This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGIONSIZE_2MB
-  *         @arg @ref LL_ICACHE_REGIONSIZE_4MB
-  *         @arg @ref LL_ICACHE_REGIONSIZE_8MB
-  *         @arg @ref LL_ICACHE_REGIONSIZE_16MB
-  *         @arg @ref LL_ICACHE_REGIONSIZE_32MB
-  *         @arg @ref LL_ICACHE_REGIONSIZE_64MB
-  *         @arg @ref LL_ICACHE_REGIONSIZE_128MB
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_SetRegionSize(uint32_t Region, uint32_t Size)
-{
-  MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-             ICACHE_CRRx_RSIZE, (Size << ICACHE_CRRx_RSIZE_Pos));
-}
-
-/**
-  * @brief  Get the selected the memory remapped region size.
-  * @rmtoll CRRx         RSIZE         LL_ICACHE_GetRegionSize
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGIONSIZE_2MB
-  *         @arg @ref LL_ICACHE_REGIONSIZE_4MB
-  *         @arg @ref LL_ICACHE_REGIONSIZE_8MB
-  *         @arg @ref LL_ICACHE_REGIONSIZE_16MB
-  *         @arg @ref LL_ICACHE_REGIONSIZE_32MB
-  *         @arg @ref LL_ICACHE_REGIONSIZE_64MB
-  *         @arg @ref LL_ICACHE_REGIONSIZE_128MB
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_GetRegionSize(uint32_t Region)
-{
-  return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-                   ICACHE_CRRx_RSIZE) >> ICACHE_CRRx_RSIZE_Pos);
-}
-
-/**
-  * @brief  Select the memory remapped region output burst type.
-  * @rmtoll CRRx         HBURST        LL_ICACHE_SetRegionOutputBurstType
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @param  Type This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_OUTPUT_BURST_WRAP
-  *         @arg @ref LL_ICACHE_OUTPUT_BURST_INCR
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_SetRegionOutputBurstType(uint32_t Region, uint32_t Type)
-{
-  MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-             ICACHE_CRRx_HBURST, Type);
-}
-
-/**
-  * @brief  Get the selected the memory remapped region output burst type.
-  * @rmtoll CRRx         HBURST        LL_ICACHE_GetRegionOutputBurstType
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ICACHE_OUTPUT_BURST_WRAP
-  *         @arg @ref LL_ICACHE_OUTPUT_BURST_INCR
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_GetRegionOutputBurstType(uint32_t Region)
-{
-  return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-                   ICACHE_CRRx_HBURST));
-}
-
-/**
-  * @brief  Select the memory remapped region cache master port.
-  * @rmtoll CRRx         MSTSEL        LL_ICACHE_SetRegionMasterPort
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @param  Port This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_MASTER1_PORT
-  *         @arg @ref LL_ICACHE_MASTER2_PORT
-  * @retval None
-  */
-__STATIC_INLINE void LL_ICACHE_SetRegionMasterPort(uint32_t Region, uint32_t Port)
-{
-  MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-             ICACHE_CRRx_MSTSEL, Port);
-}
-
-/**
-  * @brief  Get the selected the memory remapped region cache master port.
-  * @rmtoll CRRx         MSTSEL        LL_ICACHE_GetRegionMasterPort
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_ICACHE_REGION_0
-  *         @arg @ref LL_ICACHE_REGION_1
-  *         @arg @ref LL_ICACHE_REGION_2
-  *         @arg @ref LL_ICACHE_REGION_3
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ICACHE_MASTER1_PORT
-  *         @arg @ref LL_ICACHE_MASTER2_PORT
-  */
-__STATIC_INLINE uint32_t LL_ICACHE_GetRegionMasterPort(uint32_t Region)
-{
-  return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
-                   ICACHE_CRRx_MSTSEL));
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup ICACHE_LL_EF_REGION_Init Region Initialization functions
-  * @{
-  */
-
-void LL_ICACHE_ConfigRegion(uint32_t Region, const LL_ICACHE_RegionTypeDef *const pICACHE_RegionStruct);
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-#endif /*  ICACHE_CRRx_REN */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* ICACHE */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* STM32H5xx_LL_ICACHE_H */

Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_icache.c

@@ -1,657 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32h5xx_hal_icache.c
-  * @author  MCD Application Team
-  * @brief   ICACHE HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the Instruction Cache (ICACHE).
-  *           + Initialization and Configuration
-  *           + Invalidate functions
-  *           + Monitoring management
-  *           + Memory address remap management
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2023 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  @verbatim
-  ==============================================================================
-                        ##### ICACHE main features #####
-  ==============================================================================
-  [..]
-    The Instruction Cache (ICACHE) is introduced on C-AHB code bus of
-    Cortex-M33 processor to improve performance when fetching instruction
-    and data from both internal and external memories. It allows close to
-    zero wait states performance.
-
-    (+) The ICACHE provides two performance counters (Hit and Miss),
-        cache invalidate maintenance operation, error management and TrustZone
-        security support.
-
-    (+) The ICACHE provides additionally the possibility to remap input address
-        falling into up to four memory regions (used to remap aliased code in
-        external memories to the internal Code region, for execution)
-
-  ===============================================================================
-                        ##### How to use this driver #####
-  ===============================================================================
-  [..]
-     The ICACHE HAL driver can be used as follows:
-
-    (#) Optionally configure the Instruction Cache mode with
-        HAL_ICACHE_ConfigAssociativityMode() if the default configuration
-        does not suit the application requirements.
-
-    (#) Enable and disable the Instruction Cache with respectively
-        HAL_ICACHE_Enable() and HAL_ICACHE_Disable().
-        Use HAL_ICACHE_IsEnabled() to get the Instruction Cache status.
-        To ensure a deterministic cache behavior after power on, system reset or after
-        a call to @ref HAL_ICACHE_Disable(), the application must call
-        @ref HAL_ICACHE_WaitForInvalidateComplete(). Indeed on power on, system reset
-        or cache disable, an automatic cache invalidation procedure is launched and the
-        cache is bypassed until the operation completes.
-
-    (#) Initiate the cache maintenance invalidation procedure with either
-        HAL_ICACHE_Invalidate() (blocking mode) or HAL_ICACHE_Invalidate_IT()
-        (interrupt mode). When interrupt mode is used, the callback function
-        HAL_ICACHE_InvalidateCompleteCallback() is called when the invalidate
-        procedure is complete. The function HAL_ICACHE_WaitForInvalidateComplete()
-        may be called to wait for the end of the invalidate procedure automatically
-        initiated when disabling the Instruction Cache with HAL_ICACHE_Disable().
-        The cache operation is bypassed during the invalidation procedure.
-
-    (#) Use the performance monitoring counters for Hit and Miss with the following
-        functions: HAL_ICACHE_Monitor_Start(), HAL_ICACHE_Monitor_Stop(),
-        HAL_ICACHE_Monitor_Reset(), HAL_ICACHE_Monitor_GetHitValue() and
-        HAL_ICACHE_Monitor_GetMissValue()
-
-    (#) Enable and disable up to four regions to remap input address from external
-        memories to the internal Code region for execution with
-        HAL_ICACHE_EnableRemapRegion() and HAL_ICACHE_DisableRemapRegion()
-
-  @endverbatim
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32h5xx_hal.h"
-
-/** @addtogroup STM32H5xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup ICACHE ICACHE
-  * @brief HAL ICACHE module driver
-  * @{
-  */
-#if defined(ICACHE) && defined (HAL_ICACHE_MODULE_ENABLED)
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @addtogroup ICACHE_Private_Constants ICACHE Private Constants
-  * @{
-  */
-#define ICACHE_INVALIDATE_TIMEOUT_VALUE        1U   /* 1ms */
-#define ICACHE_DISABLE_TIMEOUT_VALUE           1U   /* 1ms */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup ICACHE_Private_Macros ICACHE Private Macros
-  * @{
-  */
-
-#define IS_ICACHE_ASSOCIATIVITY_MODE(__MODE__) (((__MODE__) == ICACHE_1WAY) || \
-                                                ((__MODE__) == ICACHE_2WAYS))
-
-#define IS_ICACHE_MONITOR_TYPE(__TYPE__)    (((__TYPE__) == ICACHE_MONITOR_HIT_MISS) || \
-                                             ((__TYPE__) == ICACHE_MONITOR_HIT)      || \
-                                             ((__TYPE__) == ICACHE_MONITOR_MISS))
-
-#if defined(ICACHE_CRRx_REN)
-#define IS_ICACHE_REGION_NUMBER(__NUMBER__) ((__NUMBER__) < 4U)
-
-#define IS_ICACHE_REGION_SIZE(__SIZE__)     (((__SIZE__) == ICACHE_REGIONSIZE_2MB)   || \
-                                             ((__SIZE__) == ICACHE_REGIONSIZE_4MB)   || \
-                                             ((__SIZE__) == ICACHE_REGIONSIZE_8MB)   || \
-                                             ((__SIZE__) == ICACHE_REGIONSIZE_16MB)  || \
-                                             ((__SIZE__) == ICACHE_REGIONSIZE_32MB)  || \
-                                             ((__SIZE__) == ICACHE_REGIONSIZE_64MB)  || \
-                                             ((__SIZE__) == ICACHE_REGIONSIZE_128MB))
-
-#define IS_ICACHE_REGION_TRAFFIC_ROUTE(__TRAFFICROUTE__)  (((__TRAFFICROUTE__) == ICACHE_MASTER1_PORT) || \
-                                                           ((__TRAFFICROUTE__) == ICACHE_MASTER2_PORT))
-
-#define IS_ICACHE_REGION_OUTPUT_BURST_TYPE(__OUTPUTBURSTTYPE_) (((__OUTPUTBURSTTYPE_) == ICACHE_OUTPUT_BURST_WRAP) || \
-                                                                ((__OUTPUTBURSTTYPE_) == ICACHE_OUTPUT_BURST_INCR))
-
-#endif /*  ICACHE_CRRx_REN */
-/**
-  * @}
-  */
-
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup ICACHE_Exported_Functions ICACHE Exported Functions
-  * @{
-  */
-
-/** @defgroup ICACHE_Exported_Functions_Group1 Initialization and control functions
-  * @brief    Initialization and control functions
-  *
-  @verbatim
-  ==============================================================================
-            ##### Initialization and control functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to initialize and control the
-    Instruction Cache (mode, invalidate procedure, performance counters).
-  @endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Configure the Instruction Cache cache associativity mode selection.
-  * @param  AssociativityMode  Associativity mode selection
-  *         This parameter can be one of the following values:
-  *            @arg ICACHE_1WAY   1-way cache (direct mapped cache)
-  *            @arg ICACHE_2WAYS  2-ways set associative cache (default)
-  * @retval HAL status (HAL_OK/HAL_ERROR)
-  */
-HAL_StatusTypeDef HAL_ICACHE_ConfigAssociativityMode(uint32_t AssociativityMode)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-
-  /* Check the parameters */
-  assert_param(IS_ICACHE_ASSOCIATIVITY_MODE(AssociativityMode));
-
-  /* Check cache is not enabled */
-  if (READ_BIT(ICACHE->CR, ICACHE_CR_EN) != 0U)
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, AssociativityMode);
-  }
-
-  return status;
-}
-
-/**
-  * @brief  DeInitialize the Instruction Cache.
-  * @retval HAL status (HAL_OK)
-  */
-HAL_StatusTypeDef HAL_ICACHE_DeInit(void)
-{
-  /* Reset interrupt enable value */
-  WRITE_REG(ICACHE->IER, 0U);
-
-  /* Clear any pending flags */
-  WRITE_REG(ICACHE->FCR, ICACHE_FCR_CBSYENDF | ICACHE_FCR_CERRF);
-
-  /* Disable cache then set default associative mode value */
-  CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN);
-  WRITE_REG(ICACHE->CR, ICACHE_CR_WAYSEL);
-
-  /* Stop monitor and reset monitor values */
-  CLEAR_BIT(ICACHE->CR, ICACHE_MONITOR_HIT_MISS);
-  SET_BIT(ICACHE->CR, (ICACHE_MONITOR_HIT_MISS << 2U));
-  CLEAR_BIT(ICACHE->CR, (ICACHE_MONITOR_HIT_MISS << 2U));
-
-#if defined(ICACHE_CRRx_REN)
-  /* Reset regions configuration values */
-  WRITE_REG(ICACHE->CRR0, ICACHE_REGIONSIZE_2MB << ICACHE_CRRx_RSIZE_Pos);
-  WRITE_REG(ICACHE->CRR1, ICACHE_REGIONSIZE_2MB << ICACHE_CRRx_RSIZE_Pos);
-  WRITE_REG(ICACHE->CRR2, ICACHE_REGIONSIZE_2MB << ICACHE_CRRx_RSIZE_Pos);
-  WRITE_REG(ICACHE->CRR3, ICACHE_REGIONSIZE_2MB << ICACHE_CRRx_RSIZE_Pos);
-#endif /*  ICACHE_CRRx_REN */
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enable the Instruction Cache.
-  * @note   This function always returns HAL_OK even if there is any ongoing
-  *         cache operation. The Instruction Cache is bypassed until the
-  *         cache operation completes.
-  * @retval HAL status (HAL_OK)
-  */
-HAL_StatusTypeDef HAL_ICACHE_Enable(void)
-{
-  SET_BIT(ICACHE->CR, ICACHE_CR_EN);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disable the Instruction Cache.
-  * @note   This function waits for the cache being disabled but
-  *         not for the end of the automatic cache invalidation procedure.
-  * @retval HAL status (HAL_OK/HAL_TIMEOUT)
-  */
-HAL_StatusTypeDef HAL_ICACHE_Disable(void)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t tickstart;
-
-  /* Make sure BSYENDF is reset before to disable the instruction cache */
-  /* as it automatically starts a cache invalidation procedure */
-  WRITE_REG(ICACHE->FCR, ICACHE_FCR_CBSYENDF);
-
-  CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN);
-
-  /* Get tick */
-  tickstart = HAL_GetTick();
-
-  /* Wait for instruction cache being disabled */
-  while (READ_BIT(ICACHE->CR, ICACHE_CR_EN) != 0U)
-  {
-    if ((HAL_GetTick() - tickstart) > ICACHE_DISABLE_TIMEOUT_VALUE)
-    {
-      /* New check to avoid false timeout detection in case of preemption */
-      if (READ_BIT(ICACHE->CR, ICACHE_CR_EN) != 0U)
-      {
-        status = HAL_TIMEOUT;
-        break;
-      }
-    }
-  }
-
-  return status;
-}
-
-/**
-  * @brief  Check whether the Instruction Cache is enabled or not.
-  * @retval Status (0: disabled, 1: enabled)
-  */
-uint32_t HAL_ICACHE_IsEnabled(void)
-{
-  return ((READ_BIT(ICACHE->CR, ICACHE_CR_EN) != 0U) ? 1UL : 0UL);
-}
-
-/**
-  * @brief  Invalidate the Instruction Cache.
-  * @note   This function waits for the end of cache invalidation procedure
-  *         and clears the associated BSYENDF flag.
-  * @retval HAL status (HAL_OK/HAL_ERROR/HAL_TIMEOUT)
-  */
-HAL_StatusTypeDef HAL_ICACHE_Invalidate(void)
-{
-  HAL_StatusTypeDef status;
-
-  /* Check if no ongoing operation */
-  if (READ_BIT(ICACHE->SR, ICACHE_SR_BUSYF) == 0U)
-  {
-    /* Launch cache invalidation */
-    SET_BIT(ICACHE->CR, ICACHE_CR_CACHEINV);
-  }
-
-  status = HAL_ICACHE_WaitForInvalidateComplete();
-
-  return status;
-}
-
-/**
-  * @brief  Invalidate the Instruction Cache with interrupt.
-  * @note   This function launches cache invalidation and returns.
-  *         User application shall resort to interrupt generation to check
-  *         the end of the cache invalidation with the BSYENDF flag and the
-  *         HAL_ICACHE_InvalidateCompleteCallback() callback.
-  * @retval HAL status (HAL_OK/HAL_ERROR)
-  */
-HAL_StatusTypeDef HAL_ICACHE_Invalidate_IT(void)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-
-  /* Check no ongoing operation */
-  if (READ_BIT(ICACHE->SR, ICACHE_SR_BUSYF) != 0U)
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Make sure BSYENDF is reset before to start cache invalidation */
-    WRITE_REG(ICACHE->FCR, ICACHE_FCR_CBSYENDF);
-
-    /* Enable end of cache invalidation interrupt */
-    SET_BIT(ICACHE->IER, ICACHE_IER_BSYENDIE);
-
-    /* Launch cache invalidation */
-    SET_BIT(ICACHE->CR, ICACHE_CR_CACHEINV);
-  }
-
-  return status;
-}
-
-/**
-  * @brief Wait for the end of the Instruction Cache invalidate procedure.
-  * @note This function checks and clears the BSYENDF flag when set.
-  * @retval HAL status (HAL_OK/HAL_TIMEOUT)
-  */
-HAL_StatusTypeDef HAL_ICACHE_WaitForInvalidateComplete(void)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t tickstart;
-
-  /* Check if ongoing invalidation operation */
-  if (READ_BIT(ICACHE->SR, ICACHE_SR_BUSYF) != 0U)
-  {
-    /* Get tick */
-    tickstart = HAL_GetTick();
-
-    /* Wait for end of cache invalidation */
-    while (READ_BIT(ICACHE->SR, ICACHE_SR_BSYENDF) == 0U)
-    {
-      if ((HAL_GetTick() - tickstart) > ICACHE_INVALIDATE_TIMEOUT_VALUE)
-      {
-        /* New check to avoid false timeout detection in case of preemption */
-        if (READ_BIT(ICACHE->SR, ICACHE_SR_BSYENDF) == 0U)
-        {
-          status = HAL_TIMEOUT;
-          break;
-        }
-      }
-    }
-  }
-
-  /* Clear BSYENDF */
-  WRITE_REG(ICACHE->FCR, ICACHE_FCR_CBSYENDF);
-
-  return status;
-}
-
-
-/**
-  * @brief  Start the Instruction Cache performance monitoring.
-  * @param  MonitorType  Monitoring type
-  *         This parameter can be one of the following values:
-  *            @arg ICACHE_MONITOR_HIT_MISS   Hit & Miss monitoring
-  *            @arg ICACHE_MONITOR_HIT        Hit monitoring
-  *            @arg ICACHE_MONITOR_MISS       Miss monitoring
-  * @retval HAL status (HAL_OK)
-  */
-HAL_StatusTypeDef HAL_ICACHE_Monitor_Start(uint32_t MonitorType)
-{
-  /* Check the parameters */
-  assert_param(IS_ICACHE_MONITOR_TYPE(MonitorType));
-
-  SET_BIT(ICACHE->CR, MonitorType);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stop the Instruction Cache performance monitoring.
-  * @note   Stopping the monitoring does not reset the values.
-  * @param  MonitorType  Monitoring type
-  *         This parameter can be one of the following values:
-  *            @arg ICACHE_MONITOR_HIT_MISS   Hit & Miss monitoring
-  *            @arg ICACHE_MONITOR_HIT        Hit monitoring
-  *            @arg ICACHE_MONITOR_MISS       Miss monitoring
-  * @retval HAL status (HAL_OK)
-  */
-HAL_StatusTypeDef HAL_ICACHE_Monitor_Stop(uint32_t MonitorType)
-{
-  /* Check the parameters */
-  assert_param(IS_ICACHE_MONITOR_TYPE(MonitorType));
-
-  CLEAR_BIT(ICACHE->CR, MonitorType);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Reset the Instruction Cache performance monitoring values.
-  * @param  MonitorType  Monitoring type
-  *         This parameter can be one of the following values:
-  *            @arg ICACHE_MONITOR_HIT_MISS   Hit & Miss monitoring
-  *            @arg ICACHE_MONITOR_HIT        Hit monitoring
-  *            @arg ICACHE_MONITOR_MISS       Miss monitoring
-  * @retval HAL status (HAL_OK)
-  */
-HAL_StatusTypeDef HAL_ICACHE_Monitor_Reset(uint32_t MonitorType)
-{
-  /* Check the parameters */
-  assert_param(IS_ICACHE_MONITOR_TYPE(MonitorType));
-
-  /* Force/Release reset */
-  SET_BIT(ICACHE->CR, (MonitorType << 2U));
-  CLEAR_BIT(ICACHE->CR, (MonitorType << 2U));
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Get the Instruction Cache performance Hit monitoring value.
-  * @note   Upon reaching the 32-bit maximum value, monitor does not wrap.
-  * @retval Hit monitoring value
-  */
-uint32_t HAL_ICACHE_Monitor_GetHitValue(void)
-{
-  return (ICACHE->HMONR);
-}
-
-/**
-  * @brief  Get the Instruction Cache performance Miss monitoring value.
-  * @note   Upon reaching the 32-bit maximum value, monitor does not wrap.
-  * @retval Miss monitoring value
-  */
-uint32_t HAL_ICACHE_Monitor_GetMissValue(void)
-{
-  return (ICACHE->MMONR);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ICACHE_Exported_Functions_Group2 IRQ and callback functions
-  * @brief    IRQ and callback functions
-  *
-  @verbatim
-  ==============================================================================
-            ##### IRQ and callback functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to handle ICACHE global interrupt
-    and the associated callback functions.
-  @endverbatim
-  * @{
-  */
-
-/**
-  * @brief Handle the Instruction Cache interrupt request.
-  * @note This function should be called under the ICACHE_IRQHandler().
-  * @note This function respectively disables the interrupt and clears the
-  *       flag of any pending flag before calling the associated user callback.
-  * @retval None
-  */
-void HAL_ICACHE_IRQHandler(void)
-{
-  /* Get current interrupt flags and interrupt sources value */
-  uint32_t itflags   = READ_REG(ICACHE->SR);
-  uint32_t itsources = READ_REG(ICACHE->IER);
-
-  /* Check Instruction cache Error interrupt flag */
-  if (((itflags & itsources) & ICACHE_FLAG_ERROR) != 0U)
-  {
-    /* Disable error interrupt */
-    CLEAR_BIT(ICACHE->IER, ICACHE_IER_ERRIE);
-
-    /* Clear ERR pending flag */
-    WRITE_REG(ICACHE->FCR, ICACHE_FCR_CERRF);
-
-    /* Instruction cache error interrupt user callback */
-    HAL_ICACHE_ErrorCallback();
-  }
-
-  /* Check Instruction cache BusyEnd interrupt flag */
-  if (((itflags & itsources) & ICACHE_FLAG_BUSYEND) != 0U)
-  {
-    /* Disable end of cache invalidation interrupt */
-    CLEAR_BIT(ICACHE->IER, ICACHE_IER_BSYENDIE);
-
-    /* Clear BSYENDF pending flag */
-    WRITE_REG(ICACHE->FCR, ICACHE_FCR_CBSYENDF);
-
-    /* Instruction cache busyend interrupt user callback */
-    HAL_ICACHE_InvalidateCompleteCallback();
-  }
-}
-
-/**
-  * @brief  Cache invalidation complete callback.
-  */
-__weak void HAL_ICACHE_InvalidateCompleteCallback(void)
-{
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_ICACHE_InvalidateCompleteCallback() should be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Error callback.
-  */
-__weak void HAL_ICACHE_ErrorCallback(void)
-{
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_ICACHE_ErrorCallback() should be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-#if defined(ICACHE_CRRx_REN)
-/** @defgroup ICACHE_Exported_Functions_Group3 Memory remapped regions functions
-  * @brief    Memory remapped regions functions
-  *
-  @verbatim
-  ==============================================================================
-            ##### Memory remapped regions functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to manage the remapping of
-    external memories to internal Code for execution.
-  @endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Configure and enable a region for memory remapping.
-  * @note   The Instruction Cache and the region must be disabled.
-  * @param  Region   Region number
-                     This parameter can be a value of @arg @ref ICACHE_Region
-  * @param  pRegionConfig  Pointer to structure of ICACHE region configuration parameters
-  * @retval HAL status (HAL_OK/HAL_ERROR)
-  */
-HAL_StatusTypeDef  HAL_ICACHE_EnableRemapRegion(uint32_t Region, const ICACHE_RegionConfigTypeDef *const pRegionConfig)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  __IO uint32_t *p_reg;
-  uint32_t value;
-
-  /* Check the parameters */
-  assert_param(IS_ICACHE_REGION_NUMBER(Region));
-  assert_param(IS_ICACHE_REGION_SIZE(pRegionConfig->Size));
-  assert_param(IS_ICACHE_REGION_TRAFFIC_ROUTE(pRegionConfig->TrafficRoute));
-  assert_param(IS_ICACHE_REGION_OUTPUT_BURST_TYPE(pRegionConfig->OutputBurstType));
-
-  /* Check cache is not enabled */
-  if (READ_BIT(ICACHE->CR, ICACHE_CR_EN) != 0U)
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Get region control register address */
-    p_reg = &(ICACHE->CRR0) + (1U * Region);
-
-    /* Check region is not already enabled */
-    if ((*p_reg & ICACHE_CRRx_REN) != 0U)
-    {
-      status = HAL_ERROR;
-    }
-    else
-    {
-      /* Region 2MB:   BaseAddress size 8 bits, RemapAddress size 11 bits */
-      /* Region 4MB:   BaseAddress size 7 bits, RemapAddress size 10 bits */
-      /* Region 8MB:   BaseAddress size 6 bits, RemapAddress size 9 bits  */
-      /* Region 16MB:  BaseAddress size 5 bits, RemapAddress size 8 bits  */
-      /* Region 32MB:  BaseAddress size 4 bits, RemapAddress size 7 bits  */
-      /* Region 64MB:  BaseAddress size 3 bits, RemapAddress size 6 bits  */
-      /* Region 128MB: BaseAddress size 2 bits, RemapAddress size 5 bits  */
-      value  = ((pRegionConfig->BaseAddress & 0x1FFFFFFFU) >> 21U) & \
-               (0xFFU & ~(pRegionConfig->Size - 1U));
-      value |= ((pRegionConfig->RemapAddress >> 5U) & \
-                ((uint32_t)(0x7FFU & ~(pRegionConfig->Size - 1U)) << ICACHE_CRRx_REMAPADDR_Pos));
-      value |= (pRegionConfig->Size << ICACHE_CRRx_RSIZE_Pos) | pRegionConfig->TrafficRoute | \
-               pRegionConfig->OutputBurstType;
-      *p_reg = (value | ICACHE_CRRx_REN);
-    }
-  }
-
-  return status;
-}
-
-/**
-  * @brief  Disable the memory remapping for a predefined region.
-  * @param  Region   Region number
-                     This parameter can be a value of @arg @ref ICACHE_Region
-  * @retval HAL status (HAL_OK/HAL_ERROR)
-  */
-HAL_StatusTypeDef  HAL_ICACHE_DisableRemapRegion(uint32_t Region)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  __IO uint32_t *p_reg;
-
-  /* Check the parameters */
-  assert_param(IS_ICACHE_REGION_NUMBER(Region));
-
-  /* Check cache is not enabled */
-  if (READ_BIT(ICACHE->CR, ICACHE_CR_EN) != 0U)
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Get region control register address */
-    p_reg = &(ICACHE->CRR0) + (1U * Region);
-
-    *p_reg &= ~ICACHE_CRRx_REN;
-  }
-
-  return status;
-}
-
-
-/**
-  * @}
-  */
-#endif /*  ICACHE_CRRx_REN */
-
-/**
-  * @}
-  */
-
-#endif /* ICACHE && HAL_ICACHE_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */

MDK-ARM/.vscode/c_cpp_properties.json

@@ -11,6 +11,7 @@
                 "d:\\advance_stick\\AutoGuideStick\\Drivers\\CMSIS\\Device\\ST\\STM32H5xx\\Include",
                 "d:\\advance_stick\\AutoGuideStick\\Middlewares\\ST\\threadx\\ports\\cortex_m33\\ac6\\inc",
                 "d:\\advance_stick\\AutoGuideStick\\Drivers\\CMSIS\\Include",
+                "d:\\advance_stick\\AutoGuideStick\\fun",
                 "D:\\keil5\\ARM\\ARMCLANG\\include",
                 "D:\\keil5\\ARM\\ARMCLANG\\include\\arm_linux",
                 "D:\\keil5\\ARM\\ARMCLANG\\include\\arm_linux_compat",

MDK-ARM/.vscode/keil-assistant.log

@@ -0,0 +1,43 @@
+[info] Log at : 2025/6/4|21:10:03|GMT+0800
+
+[info] Log at : 2025/6/6|21:03:44|GMT+0800
+
+[info] Log at : 2025/6/7|15:16:44|GMT+0800
+
+[info] Log at : 2025/6/7|16:13:28|GMT+0800
+
+[info] Log at : 2025/6/7|22:48:28|GMT+0800
+
+[info] Log at : 2025/6/7|22:48:50|GMT+0800
+
+[info] Log at : 2025/6/7|23:59:46|GMT+0800
+
+[info] Log at : 2025/6/8|20:26:47|GMT+0800
+
+[info] Log at : 2025/6/8|20:30:10|GMT+0800
+
+[info] Log at : 2025/6/8|20:31:15|GMT+0800
+
+[info] Log at : 2025/6/8|20:32:47|GMT+0800
+
+[info] project closed: AutoGuideStick
+[info] Log at : 2025/6/8|20:33:15|GMT+0800
+
+[info] Log at : 2025/6/8|20:34:25|GMT+0800
+
+[info] project closed: AutoGuideStick
+[info] Log at : 2025/6/8|20:51:48|GMT+0800
+
+[info] project closed: AutoGuideStick
+[info] Log at : 2025/6/8|20:57:54|GMT+0800
+
+[info] Log at : 2025/6/8|21:00:00|GMT+0800
+
+[info] Log at : 2025/6/9|21:24:00|GMT+0800
+
+[info] Log at : 2025/6/9|21:25:14|GMT+0800
+
+[info] Log at : 2025/6/9|21:25:19|GMT+0800
+
+[info] Log at : 2025/6/9|21:52:22|GMT+0800
+

MDK-ARM/.vscode/uv4.log

@@ -0,0 +1,191 @@
+*** Using Compiler 'V6.21', folder: 'D:\keil5\ARM\ARMCLANG\Bin'
+Build target 'AutoGuideStick'
+compiling memorymap.c...
+compiling app_azure_rtos.c...
+compiling gpdma.c...
+compiling usart.c...
+compiling gpio.c...
+compiling stm32h5xx_hal_tim_ex.c...
+compiling stm32h5xx_hal_tim.c...
+compiling app_threadx.c...
+compiling stm32h5xx_hal_cortex.c...
+compiling stm32h5xx_hal_dma.c...
+compiling main.c...
+compiling stm32h5xx_hal_timebase_tim.c...
+compiling stm32h5xx_hal_msp.c...
+compiling stm32h5xx_it.c...
+compiling stm32h5xx_hal_dma_ex.c...
+compiling stm32h5xx_hal_rcc.c...
+compiling stm32h5xx_hal_flash.c...
+compiling stm32h5xx_hal_rcc_ex.c...
+compiling stm32h5xx_hal_flash_ex.c...
+compiling stm32h5xx_hal_gpio.c...
+compiling stm32h5xx_hal_pwr.c...
+compiling stm32h5xx_hal_pwr_ex.c...
+compiling stm32h5xx_hal.c...
+compiling stm32h5xx_hal_exti.c...
+compiling tx_initialize_high_level.c...
+compiling stm32h5xx_hal_uart_ex.c...
+compiling system_stm32h5xx.c...
+compiling tx_initialize_kernel_enter.c...
+compiling stm32h5xx_hal_uart.c...
+compiling tx_initialize_kernel_setup.c...
+compiling tx_thread_stack_error_handler.c...
+compiling tx_thread_stack_error_notify.c...
+compiling tx_thread_system_resume.c...
+compiling tx_block_allocate.c...
+compiling tx_block_pool_cleanup.c...
+compiling tx_block_pool_create.c...
+compiling tx_block_pool_delete.c...
+compiling tx_block_pool_info_get.c...
+compiling tx_block_pool_initialize.c...
+compiling tx_block_pool_prioritize.c...
+compiling tx_block_release.c...
+compiling tx_byte_allocate.c...
+compiling tx_byte_pool_cleanup.c...
+compiling tx_byte_pool_create.c...
+compiling tx_byte_pool_delete.c...
+compiling tx_byte_pool_info_get.c...
+compiling tx_byte_pool_initialize.c...
+compiling tx_byte_pool_prioritize.c...
+compiling tx_byte_pool_search.c...
+compiling tx_byte_release.c...
+compiling tx_event_flags_cleanup.c...
+compiling tx_event_flags_create.c...
+compiling tx_event_flags_delete.c...
+compiling tx_event_flags_info_get.c...
+compiling tx_event_flags_get.c...
+compiling tx_event_flags_initialize.c...
+compiling tx_event_flags_set.c...
+compiling tx_event_flags_set_notify.c...
+compiling tx_mutex_cleanup.c...
+compiling tx_mutex_create.c...
+compiling tx_mutex_delete.c...
+compiling tx_mutex_get.c...
+compiling tx_mutex_info_get.c...
+compiling tx_mutex_initialize.c...
+compiling tx_mutex_prioritize.c...
+compiling tx_mutex_priority_change.c...
+compiling tx_mutex_put.c...
+compiling tx_queue_cleanup.c...
+compiling tx_queue_create.c...
+compiling tx_queue_delete.c...
+compiling tx_queue_flush.c...
+compiling tx_queue_front_send.c...
+compiling tx_queue_info_get.c...
+compiling tx_queue_initialize.c...
+compiling tx_queue_prioritize.c...
+compiling tx_queue_receive.c...
+compiling tx_queue_send.c...
+compiling tx_queue_send_notify.c...
+compiling tx_semaphore_ceiling_put.c...
+compiling tx_semaphore_cleanup.c...
+compiling tx_semaphore_create.c...
+compiling tx_semaphore_delete.c...
+compiling tx_semaphore_get.c...
+compiling tx_semaphore_info_get.c...
+compiling tx_semaphore_initialize.c...
+compiling tx_semaphore_prioritize.c...
+compiling tx_semaphore_put.c...
+compiling tx_semaphore_put_notify.c...
+compiling tx_thread_create.c...
+compiling tx_thread_delete.c...
+compiling tx_thread_entry_exit_notify.c...
+compiling tx_thread_identify.c...
+compiling tx_thread_info_get.c...
+compiling tx_thread_initialize.c...
+compiling tx_thread_preemption_change.c...
+compiling tx_thread_priority_change.c...
+compiling tx_thread_relinquish.c...
+compiling tx_thread_reset.c...
+compiling tx_thread_shell_entry.c...
+compiling tx_thread_resume.c...
+compiling tx_thread_sleep.c...
+compiling tx_thread_stack_analyze.c...
+compiling tx_thread_suspend.c...
+compiling tx_thread_system_preempt_check.c...
+compiling tx_thread_system_suspend.c...
+compiling tx_thread_terminate.c...
+compiling tx_thread_time_slice.c...
+compiling tx_thread_time_slice_change.c...
+compiling tx_thread_timeout.c...
+compiling tx_thread_wait_abort.c...
+compiling tx_time_get.c...
+compiling tx_time_set.c...
+compiling txe_block_allocate.c...
+compiling txe_block_pool_create.c...
+compiling txe_block_pool_delete.c...
+compiling txe_block_pool_info_get.c...
+compiling txe_block_pool_prioritize.c...
+compiling txe_block_release.c...
+compiling txe_byte_allocate.c...
+compiling txe_byte_pool_create.c...
+compiling txe_byte_pool_delete.c...
+compiling txe_byte_pool_info_get.c...
+compiling txe_byte_pool_prioritize.c...
+compiling txe_byte_release.c...
+compiling txe_event_flags_create.c...
+compiling txe_event_flags_delete.c...
+compiling txe_event_flags_get.c...
+compiling txe_event_flags_info_get.c...
+compiling txe_event_flags_set.c...
+compiling txe_event_flags_set_notify.c...
+compiling txe_mutex_create.c...
+compiling txe_mutex_delete.c...
+compiling txe_mutex_get.c...
+compiling txe_mutex_info_get.c...
+compiling txe_mutex_prioritize.c...
+compiling txe_mutex_put.c...
+compiling txe_queue_create.c...
+compiling txe_queue_delete.c...
+compiling txe_queue_flush.c...
+compiling txe_queue_front_send.c...
+compiling txe_queue_info_get.c...
+compiling txe_queue_prioritize.c...
+compiling txe_queue_receive.c...
+compiling txe_queue_send.c...
+compiling txe_queue_send_notify.c...
+compiling txe_semaphore_ceiling_put.c...
+compiling txe_semaphore_create.c...
+compiling txe_semaphore_delete.c...
+compiling txe_semaphore_get.c...
+compiling txe_semaphore_info_get.c...
+compiling txe_semaphore_prioritize.c...
+compiling txe_semaphore_put.c...
+compiling txe_semaphore_put_notify.c...
+compiling txe_thread_create.c...
+compiling txe_thread_delete.c...
+compiling txe_thread_entry_exit_notify.c...
+compiling txe_thread_info_get.c...
+compiling txe_thread_preemption_change.c...
+compiling txe_thread_priority_change.c...
+compiling txe_thread_relinquish.c...
+compiling txe_thread_reset.c...
+compiling txe_thread_resume.c...
+compiling txe_thread_suspend.c...
+compiling txe_thread_terminate.c...
+compiling txe_thread_time_slice_change.c...
+compiling txe_thread_wait_abort.c...
+compiling tx_timer_activate.c...
+compiling tx_timer_change.c...
+compiling tx_timer_create.c...
+compiling tx_timer_deactivate.c...
+compiling tx_timer_delete.c...
+compiling tx_timer_expiration_process.c...
+compiling tx_timer_info_get.c...
+compiling tx_timer_initialize.c...
+compiling tx_timer_system_activate.c...
+compiling tx_timer_system_deactivate.c...
+compiling tx_timer_thread_entry.c...
+compiling txe_timer_activate.c...
+compiling txe_timer_change.c...
+compiling txe_timer_create.c...
+compiling txe_timer_deactivate.c...
+compiling txe_timer_delete.c...
+compiling txe_timer_info_get.c...
+compiling HCBle.c...
+linking...
+Program Size: Code=54718 RO-data=726 RW-data=16 ZI-data=5296  
+FromELF: creating hex file...
+"AutoGuideStick\AutoGuideStick.axf" - 0 Error(s), 0 Warning(s).
+Build Time Elapsed:  00:00:24

MDK-ARM/.vscode/uv4.log.lock

@@ -0,0 +1 @@
+2025/6/9 21:28:26

MDK-ARM/AutoGuideStick.uvprojx

@@ -1,41 +1,46 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_projx.xsd">
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
   <SchemaVersion>2.1</SchemaVersion>
+
   <Header>### uVision Project, (C) Keil Software</Header>
+
   <Targets>
     <Target>
       <TargetName>AutoGuideStick</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6140001::V6.14.1::ARMCLANG</pCCUsed>
+      <pCCUsed>6210000::V6.21::ARMCLANG</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>STM32H563ZITx</Device>
           <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32H5xx_DFP.1.3.0</PackID>
+          <PackURL>https://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000-0x2009FFFF) IROM(0x08000000-0x81FFFFF) CLOCK(8000000) FPU3(SFPU) CPUTYPE("Cortex-M33") ELITTLE TZ DSP</Cpu>
-          <FlashUtilSpec />
-          <StartupFile />
-          <FlashDriverDll />
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
           <DeviceId>0</DeviceId>
-          <RegisterFile />
-          <MemoryEnv />
-          <Cmp />
-          <Asm />
-          <Linker />
-          <OHString />
-          <InfinionOptionDll />
-          <SLE66CMisc />
-          <SLE66AMisc />
-          <SLE66LinkerMisc />
-          <SFDFile />
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32H563ZITx$CMSIS\SVD\STM32H563.svd</SFDFile>
           <bCustSvd>0</bCustSvd>
           <UseEnv>0</UseEnv>
-          <BinPath />
-          <IncludePath />
-          <LibPath />
-          <RegisterFilePath />
-          <DBRegisterFilePath />
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
           <TargetStatus>
             <Error>0</Error>
             <ExitCodeStop>0</ExitCodeStop>
@@ -50,15 +55,15 @@
           <CreateHexFile>1</CreateHexFile>
           <DebugInformation>1</DebugInformation>
           <BrowseInformation>1</BrowseInformation>
-          <ListingPath>./AutoGuideStick/</ListingPath>
+          <ListingPath></ListingPath>
           <HexFormatSelection>1</HexFormatSelection>
           <Merge32K>0</Merge32K>
           <CreateBatchFile>0</CreateBatchFile>
           <BeforeCompile>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name />
-            <UserProg2Name />
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
             <nStopU1X>0</nStopU1X>
@@ -67,8 +72,8 @@
           <BeforeMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name />
-            <UserProg2Name />
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
             <nStopB1X>0</nStopB1X>
@@ -77,15 +82,15 @@
           <AfterMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>1</RunUserProg2>
-            <UserProg1Name />
-            <UserProg2Name />
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
             <nStopA1X>0</nStopA1X>
             <nStopA2X>0</nStopA2X>
           </AfterMake>
           <SelectedForBatchBuild>1</SelectedForBatchBuild>
-          <SVCSIdString />
+          <SVCSIdString></SVCSIdString>
         </TargetCommonOption>
         <CommonProperty>
           <UseCPPCompiler>0</UseCPPCompiler>
@@ -99,15 +104,15 @@
           <AssembleAssemblyFile>0</AssembleAssemblyFile>
           <PublicsOnly>0</PublicsOnly>
           <StopOnExitCode>3</StopOnExitCode>
-          <CustomArgument />
-          <IncludeLibraryModules />
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
           <ComprImg>0</ComprImg>
         </CommonProperty>
         <DllOption>
-          <SimDllName />
-          <SimDllArguments />
-          <SimDlgDll />
-          <SimDlgDllArguments />
+          <SimDllName></SimDllName>
+          <SimDllArguments></SimDllArguments>
+          <SimDlgDll></SimDlgDll>
+          <SimDlgDllArguments></SimDlgDllArguments>
           <TargetDllName>SARMV8M.DLL</TargetDllName>
           <TargetDllArguments>-MPU</TargetDllArguments>
           <TargetDlgDll>TCM.DLL</TargetDlgDll>
@@ -133,11 +138,11 @@
           </Flash1>
           <bUseTDR>1</bUseTDR>
           <Flash2>BIN\UL2V8M.DLL</Flash2>
-          <Flash3 />
-          <Flash4 />
-          <pFcarmOut />
-          <pFcarmGrp />
-          <pFcArmRoot />
+          <Flash3>"" ()</Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
           <FcArmLst>0</FcArmLst>
         </Utilities>
         <TargetArmAds>
@@ -170,7 +175,7 @@
             <RvctClst>0</RvctClst>
             <GenPPlst>0</GenPPlst>
             <AdsCpuType>"Cortex-M33"</AdsCpuType>
-            <RvctDeviceName />
+            <RvctDeviceName></RvctDeviceName>
             <mOS>0</mOS>
             <uocRom>0</uocRom>
             <uocRam>0</uocRam>
@@ -181,10 +186,11 @@
             <RvdsVP>2</RvdsVP>
             <RvdsMve>0</RvdsMve>
             <RvdsCdeCp>0</RvdsCdeCp>
+            <nBranchProt>0</nBranchProt>
             <hadIRAM2>0</hadIRAM2>
-            <hadIROM2>1</hadIROM2>
+            <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
-            <useUlib>0</useUlib>
+            <useUlib>1</useUlib>
             <EndSel>0</EndSel>
             <uLtcg>0</uLtcg>
             <nSecure>0</nSecure>
@@ -201,7 +207,7 @@
             <Ro2Chk>0</Ro2Chk>
             <Ro3Chk>0</Ro3Chk>
             <Ir1Chk>1</Ir1Chk>
-            <Ir2Chk>1</Ir2Chk>
+            <Ir2Chk>0</Ir2Chk>
             <Ra1Chk>0</Ra1Chk>
             <Ra2Chk>0</Ra2Chk>
             <Ra3Chk>0</Ra3Chk>
@@ -240,13 +246,13 @@
               </Ocm6>
               <IRAM>
                 <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0xa0000</Size>
               </IRAM>
               <IROM>
                 <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x200000</Size>
               </IROM>
               <XRAM>
                 <Type>0</Type>
@@ -270,8 +276,8 @@
               </OCR_RVCT3>
               <OCR_RVCT4>
                 <Type>1</Type>
-                <StartAddress />
-                <Size />
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x200000</Size>
               </OCR_RVCT4>
               <OCR_RVCT5>
                 <Type>1</Type>
@@ -295,8 +301,8 @@
               </OCR_RVCT8>
               <OCR_RVCT9>
                 <Type>0</Type>
-                <StartAddress />
-                <Size />
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0xa0000</Size>
               </OCR_RVCT9>
               <OCR_RVCT10>
                 <Type>0</Type>
@@ -304,11 +310,11 @@
                 <Size>0x0</Size>
               </OCR_RVCT10>
             </OnChipMemories>
-            <RvctStartVector />
+            <RvctStartVector></RvctStartVector>
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>1</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
             <OneElfS>1</OneElfS>
@@ -331,10 +337,10 @@
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls />
+              <MiscControls></MiscControls>
               <Define>TX_INCLUDE_USER_DEFINE_FILE,TX_SINGLE_MODE_NON_SECURE=1,USE_HAL_DRIVER,STM32H563xx</Define>
-              <Undefine />
-              <IncludePath>../Core/Inc;../AZURE_RTOS/App;../Drivers/STM32H5xx_HAL_Driver/Inc;../Drivers/STM32H5xx_HAL_Driver/Inc/Legacy;../Middlewares/ST/threadx/common/inc;../Drivers/CMSIS/Device/ST/STM32H5xx/Include;../Middlewares/ST/threadx/ports/cortex_m33/ac6/inc;../Drivers/CMSIS/Include</IncludePath>
+              <Undefine></Undefine>
+              <IncludePath>../Core/Inc;../AZURE_RTOS/App;../Drivers/STM32H5xx_HAL_Driver/Inc;../Drivers/STM32H5xx_HAL_Driver/Inc/Legacy;../Middlewares/ST/threadx/common/inc;../Drivers/CMSIS/Device/ST/STM32H5xx/Include;../Middlewares/ST/threadx/ports/cortex_m33/ac6/inc;../Drivers/CMSIS/Include;../fun</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -349,9 +355,9 @@
             <useXO>0</useXO>
             <ClangAsOpt>1</ClangAsOpt>
             <VariousControls>
-              <MiscControls />
+              <MiscControls></MiscControls>
               <Define>TX_SINGLE_MODE_NON_SECURE=1</Define>
-              <Undefine />
+              <Undefine></Undefine>
               <IncludePath>../Core/Inc;../AZURE_RTOS/App;../Drivers/STM32H5xx_HAL_Driver/Inc;../Drivers/STM32H5xx_HAL_Driver/Inc/Legacy;../Middlewares/ST/threadx/common/inc;../Drivers/CMSIS/Device/ST/STM32H5xx/Include;../Middlewares/ST/threadx/ports/cortex_m33/ac6/inc;../Drivers/CMSIS/Include</IncludePath>
             </VariousControls>
           </Aads>
@@ -362,15 +368,15 @@
             <noStLib>0</noStLib>
             <RepFail>1</RepFail>
             <useFile>0</useFile>
-            <TextAddressRange />
-            <DataAddressRange />
-            <pXoBase />
-            <ScatterFile />
-            <IncludeLibs />
-            <IncludeLibsPath />
-            <Misc />
-            <LinkerInputFile />
-            <DisabledWarnings />
+            <TextAddressRange></TextAddressRange>
+            <DataAddressRange></DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
           </LDads>
         </TargetArmAds>
       </TargetOption>
@@ -404,9 +410,60 @@
               <FilePath>../Core/Src/gpio.c</FilePath>
             </File>
             <File>
-              <FileName>icache.c</FileName>
+              <FileName>gpdma.c</FileName>
               <FileType>1</FileType>
-              <FilePath>../Core/Src/icache.c</FilePath>
+              <FilePath>../Core/Src/gpdma.c</FilePath>
+              <FileOption>
+                <CommonProperty>
+                  <UseCPPCompiler>2</UseCPPCompiler>
+                  <RVCTCodeConst>0</RVCTCodeConst>
+                  <RVCTZI>0</RVCTZI>
+                  <RVCTOtherData>0</RVCTOtherData>
+                  <ModuleSelection>0</ModuleSelection>
+                  <IncludeInBuild>1</IncludeInBuild>
+                  <AlwaysBuild>2</AlwaysBuild>
+                  <GenerateAssemblyFile>2</GenerateAssemblyFile>
+                  <AssembleAssemblyFile>2</AssembleAssemblyFile>
+                  <PublicsOnly>2</PublicsOnly>
+                  <StopOnExitCode>11</StopOnExitCode>
+                  <CustomArgument></CustomArgument>
+                  <IncludeLibraryModules></IncludeLibraryModules>
+                  <ComprImg>1</ComprImg>
+                </CommonProperty>
+                <FileArmAds>
+                  <Cads>
+                    <interw>2</interw>
+                    <Optim>0</Optim>
+                    <oTime>2</oTime>
+                    <SplitLS>2</SplitLS>
+                    <OneElfS>2</OneElfS>
+                    <Strict>2</Strict>
+                    <EnumInt>2</EnumInt>
+                    <PlainCh>2</PlainCh>
+                    <Ropi>2</Ropi>
+                    <Rwpi>2</Rwpi>
+                    <wLevel>0</wLevel>
+                    <uThumb>2</uThumb>
+                    <uSurpInc>2</uSurpInc>
+                    <uC99>2</uC99>
+                    <uGnu>2</uGnu>
+                    <useXO>2</useXO>
+                    <v6Lang>0</v6Lang>
+                    <v6LangP>0</v6LangP>
+                    <vShortEn>2</vShortEn>
+                    <vShortWch>2</vShortWch>
+                    <v6Lto>2</v6Lto>
+                    <v6WtE>2</v6WtE>
+                    <v6Rtti>2</v6Rtti>
+                    <VariousControls>
+                      <MiscControls></MiscControls>
+                      <Define></Define>
+                      <Undefine></Undefine>
+                      <IncludePath></IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
             </File>
             <File>
               <FileName>memorymap.c</FileName>
@@ -418,6 +475,118 @@
               <FileType>1</FileType>
               <FilePath>../Core/Src/app_threadx.c</FilePath>
             </File>
+            <File>
+              <FileName>tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Core/Src/tim.c</FilePath>
+              <FileOption>
+                <CommonProperty>
+                  <UseCPPCompiler>2</UseCPPCompiler>
+                  <RVCTCodeConst>0</RVCTCodeConst>
+                  <RVCTZI>0</RVCTZI>
+                  <RVCTOtherData>0</RVCTOtherData>
+                  <ModuleSelection>0</ModuleSelection>
+                  <IncludeInBuild>1</IncludeInBuild>
+                  <AlwaysBuild>2</AlwaysBuild>
+                  <GenerateAssemblyFile>2</GenerateAssemblyFile>
+                  <AssembleAssemblyFile>2</AssembleAssemblyFile>
+                  <PublicsOnly>2</PublicsOnly>
+                  <StopOnExitCode>11</StopOnExitCode>
+                  <CustomArgument></CustomArgument>
+                  <IncludeLibraryModules></IncludeLibraryModules>
+                  <ComprImg>1</ComprImg>
+                </CommonProperty>
+                <FileArmAds>
+                  <Cads>
+                    <interw>2</interw>
+                    <Optim>0</Optim>
+                    <oTime>2</oTime>
+                    <SplitLS>2</SplitLS>
+                    <OneElfS>2</OneElfS>
+                    <Strict>2</Strict>
+                    <EnumInt>2</EnumInt>
+                    <PlainCh>2</PlainCh>
+                    <Ropi>2</Ropi>
+                    <Rwpi>2</Rwpi>
+                    <wLevel>0</wLevel>
+                    <uThumb>2</uThumb>
+                    <uSurpInc>2</uSurpInc>
+                    <uC99>2</uC99>
+                    <uGnu>2</uGnu>
+                    <useXO>2</useXO>
+                    <v6Lang>0</v6Lang>
+                    <v6LangP>0</v6LangP>
+                    <vShortEn>2</vShortEn>
+                    <vShortWch>2</vShortWch>
+                    <v6Lto>2</v6Lto>
+                    <v6WtE>2</v6WtE>
+                    <v6Rtti>2</v6Rtti>
+                    <VariousControls>
+                      <MiscControls></MiscControls>
+                      <Define></Define>
+                      <Undefine></Undefine>
+                      <IncludePath></IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+            <File>
+              <FileName>usart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Core/Src/usart.c</FilePath>
+              <FileOption>
+                <CommonProperty>
+                  <UseCPPCompiler>2</UseCPPCompiler>
+                  <RVCTCodeConst>0</RVCTCodeConst>
+                  <RVCTZI>0</RVCTZI>
+                  <RVCTOtherData>0</RVCTOtherData>
+                  <ModuleSelection>0</ModuleSelection>
+                  <IncludeInBuild>1</IncludeInBuild>
+                  <AlwaysBuild>2</AlwaysBuild>
+                  <GenerateAssemblyFile>2</GenerateAssemblyFile>
+                  <AssembleAssemblyFile>2</AssembleAssemblyFile>
+                  <PublicsOnly>2</PublicsOnly>
+                  <StopOnExitCode>11</StopOnExitCode>
+                  <CustomArgument></CustomArgument>
+                  <IncludeLibraryModules></IncludeLibraryModules>
+                  <ComprImg>1</ComprImg>
+                </CommonProperty>
+                <FileArmAds>
+                  <Cads>
+                    <interw>2</interw>
+                    <Optim>0</Optim>
+                    <oTime>2</oTime>
+                    <SplitLS>2</SplitLS>
+                    <OneElfS>2</OneElfS>
+                    <Strict>2</Strict>
+                    <EnumInt>2</EnumInt>
+                    <PlainCh>2</PlainCh>
+                    <Ropi>2</Ropi>
+                    <Rwpi>2</Rwpi>
+                    <wLevel>0</wLevel>
+                    <uThumb>2</uThumb>
+                    <uSurpInc>2</uSurpInc>
+                    <uC99>2</uC99>
+                    <uGnu>2</uGnu>
+                    <useXO>2</useXO>
+                    <v6Lang>0</v6Lang>
+                    <v6LangP>0</v6LangP>
+                    <vShortEn>2</vShortEn>
+                    <vShortWch>2</vShortWch>
+                    <v6Lto>2</v6Lto>
+                    <v6WtE>2</v6WtE>
+                    <v6Rtti>2</v6Rtti>
+                    <VariousControls>
+                      <MiscControls></MiscControls>
+                      <Define></Define>
+                      <Undefine></Undefine>
+                      <IncludePath></IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
             <File>
               <FileName>stm32h5xx_it.c</FileName>
               <FileType>1</FileType>
@@ -519,9 +688,116 @@
               <FilePath>../Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_exti.c</FilePath>
             </File>
             <File>
-              <FileName>stm32h5xx_hal_icache.c</FileName>
+              <FileName>stm32h5xx_hal_uart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>../Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_icache.c</FilePath>
+              <FilePath>../Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_uart.c</FilePath>
+              <FileOption>
+                <CommonProperty>
+                  <UseCPPCompiler>2</UseCPPCompiler>
+                  <RVCTCodeConst>0</RVCTCodeConst>
+                  <RVCTZI>0</RVCTZI>
+                  <RVCTOtherData>0</RVCTOtherData>
+                  <ModuleSelection>0</ModuleSelection>
+                  <IncludeInBuild>1</IncludeInBuild>
+                  <AlwaysBuild>2</AlwaysBuild>
+                  <GenerateAssemblyFile>2</GenerateAssemblyFile>
+                  <AssembleAssemblyFile>2</AssembleAssemblyFile>
+                  <PublicsOnly>2</PublicsOnly>
+                  <StopOnExitCode>11</StopOnExitCode>
+                  <CustomArgument></CustomArgument>
+                  <IncludeLibraryModules></IncludeLibraryModules>
+                  <ComprImg>1</ComprImg>
+                </CommonProperty>
+                <FileArmAds>
+                  <Cads>
+                    <interw>2</interw>
+                    <Optim>0</Optim>
+                    <oTime>2</oTime>
+                    <SplitLS>2</SplitLS>
+                    <OneElfS>2</OneElfS>
+                    <Strict>2</Strict>
+                    <EnumInt>2</EnumInt>
+                    <PlainCh>2</PlainCh>
+                    <Ropi>2</Ropi>
+                    <Rwpi>2</Rwpi>
+                    <wLevel>0</wLevel>
+                    <uThumb>2</uThumb>
+                    <uSurpInc>2</uSurpInc>
+                    <uC99>2</uC99>
+                    <uGnu>2</uGnu>
+                    <useXO>2</useXO>
+                    <v6Lang>0</v6Lang>
+                    <v6LangP>0</v6LangP>
+                    <vShortEn>2</vShortEn>
+                    <vShortWch>2</vShortWch>
+                    <v6Lto>2</v6Lto>
+                    <v6WtE>2</v6WtE>
+                    <v6Rtti>2</v6Rtti>
+                    <VariousControls>
+                      <MiscControls></MiscControls>
+                      <Define></Define>
+                      <Undefine></Undefine>
+                      <IncludePath></IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+            <File>
+              <FileName>stm32h5xx_hal_uart_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_uart_ex.c</FilePath>
+              <FileOption>
+                <CommonProperty>
+                  <UseCPPCompiler>2</UseCPPCompiler>
+                  <RVCTCodeConst>0</RVCTCodeConst>
+                  <RVCTZI>0</RVCTZI>
+                  <RVCTOtherData>0</RVCTOtherData>
+                  <ModuleSelection>0</ModuleSelection>
+                  <IncludeInBuild>1</IncludeInBuild>
+                  <AlwaysBuild>2</AlwaysBuild>
+                  <GenerateAssemblyFile>2</GenerateAssemblyFile>
+                  <AssembleAssemblyFile>2</AssembleAssemblyFile>
+                  <PublicsOnly>2</PublicsOnly>
+                  <StopOnExitCode>11</StopOnExitCode>
+                  <CustomArgument></CustomArgument>
+                  <IncludeLibraryModules></IncludeLibraryModules>
+                  <ComprImg>1</ComprImg>
+                </CommonProperty>
+                <FileArmAds>
+                  <Cads>
+                    <interw>2</interw>
+                    <Optim>0</Optim>
+                    <oTime>2</oTime>
+                    <SplitLS>2</SplitLS>
+                    <OneElfS>2</OneElfS>
+                    <Strict>2</Strict>
+                    <EnumInt>2</EnumInt>
+                    <PlainCh>2</PlainCh>
+                    <Ropi>2</Ropi>
+                    <Rwpi>2</Rwpi>
+                    <wLevel>0</wLevel>
+                    <uThumb>2</uThumb>
+                    <uSurpInc>2</uSurpInc>
+                    <uC99>2</uC99>
+                    <uGnu>2</uGnu>
+                    <useXO>2</useXO>
+                    <v6Lang>0</v6Lang>
+                    <v6LangP>0</v6LangP>
+                    <vShortEn>2</vShortEn>
+                    <vShortWch>2</vShortWch>
+                    <v6Lto>2</v6Lto>
+                    <v6WtE>2</v6WtE>
+                    <v6Rtti>2</v6Rtti>
+                    <VariousControls>
+                      <MiscControls></MiscControls>
+                      <Define></Define>
+                      <Undefine></Undefine>
+                      <IncludePath></IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
             </File>
           </Files>
         </Group>
@@ -1365,20 +1641,129 @@
             </File>
           </Files>
         </Group>
+        <Group>
+          <GroupName>fun</GroupName>
+          <Files>
+            <File>
+              <FileName>HCBle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\fun\HCBle.c</FilePath>
+            </File>
+            <File>
+              <FileName>HCBle.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\fun\HCBle.h</FilePath>
+            </File>
+            <File>
+              <FileName>headfile.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\fun\headfile.h</FilePath>
+            </File>
+            <File>
+              <FileName>gps.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\fun\gps.c</FilePath>
+            </File>
+            <File>
+              <FileName>gps.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\fun\gps.h</FilePath>
+            </File>
+            <File>
+              <FileName>Buzzer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\fun\Buzzer.c</FilePath>
+            </File>
+            <File>
+              <FileName>Buzzer.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\fun\Buzzer.h</FilePath>
+            </File>
+            <File>
+              <FileName>Shake_Motor.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\fun\Shake_Motor.c</FilePath>
+            </File>
+            <File>
+              <FileName>Shake_Motor.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\fun\Shake_Motor.h</FilePath>
+            </File>
+            <File>
+              <FileName>Ultrasound.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\fun\Ultrasound.c</FilePath>
+            </File>
+            <File>
+              <FileName>Ultrasound.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\fun\Ultrasound.h</FilePath>
+            </File>
+            <File>
+              <FileName>IMU.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\fun\IMU.c</FilePath>
+            </File>
+            <File>
+              <FileName>IMU.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\fun\IMU.h</FilePath>
+            </File>
+            <File>
+              <FileName>Motor.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\fun\Motor.c</FilePath>
+            </File>
+            <File>
+              <FileName>Motor.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\fun\Motor.h</FilePath>
+            </File>
+            <File>
+              <FileName>imu948.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\fun\imu948.c</FilePath>
+            </File>
+            <File>
+              <FileName>imu948.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\fun\imu948.h</FilePath>
+            </File>
+            <File>
+              <FileName>value.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\fun\value.h</FilePath>
+            </File>
+            <File>
+              <FileName>encoder.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\fun\encoder.c</FilePath>
+            </File>
+            <File>
+              <FileName>encoder.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\fun\encoder.h</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
       </Groups>
     </Target>
   </Targets>
+
   <RTE>
-    <apis />
+    <apis/>
     <components>
       <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0" />
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
         <targetInfos>
-          <targetInfo name="AutoGuideStick" />
+          <targetInfo name="AutoGuideStick"/>
         </targetInfos>
       </component>
     </components>
-    <files />
+    <files/>
   </RTE>
-</Project>
 
+</Project>

MDK-ARM/AutoGuideStick/AutoGuideStick.build_log.htm

@@ -0,0 +1,57 @@
+<html>
+<body>
+<pre>
+<h1><EFBFBD>Vision Build Log</h1>
+<h2>Tool Versions:</h2>
+IDE-Version: <20><>Vision V5.39.0.0
+Copyright (C) 2023 ARM Ltd and ARM Germany GmbH. All rights reserved.
+License Information: manba man, fffffff, LIC=IK1BF-6Y3R7-CXQU6-DU1PR-6YJSL-ZDVC8
+ 
+Tool Versions:
+Toolchain:       MDK-ARM Plus  Version: 5.39.0.0
+Toolchain Path:  D:\keil5\ARM\ARMCLANG\Bin
+C Compiler:      ArmClang.exe V6.21
+Assembler:       Armasm.exe V6.21
+Linker/Locator:  ArmLink.exe V6.21
+Library Manager: ArmAr.exe V6.21
+Hex Converter:   FromElf.exe V6.21
+CPU DLL:         
+Dialog DLL:      
+Target DLL:      STLink\ST-LINKIII-KEIL_SWO.dll V3.2.0.0
+Dialog DLL:      TCM.DLL V1.56.4.0
+ 
+<h2>Project:</h2>
+D:\advance_stick\AutoGuideStick\MDK-ARM\AutoGuideStick.uvprojx
+Project File Date:  07/02/2025
+
+<h2>Output:</h2>
+*** Using Compiler 'V6.21', folder: 'D:\keil5\ARM\ARMCLANG\Bin'
+Build target 'AutoGuideStick'
+"AutoGuideStick\AutoGuideStick.axf" - 0 Error(s), 0 Warning(s).
+
+<h2>Software Packages used:</h2>
+
+Package Vendor: ARM
+                http://www.keil.com/pack/ARM.CMSIS.5.9.0.pack
+                ARM::CMSIS@5.9.0
+                CMSIS (Common Microcontroller Software Interface Standard)
+   * Component: CORE Version: 5.6.0
+
+Package Vendor: Keil
+                https://www.keil.com/pack/Keil.STM32H5xx_DFP.1.3.0.pack
+                Keil::STM32H5xx_DFP@1.3.0
+                STMicroelectronics STM32H5 Series Device Support
+
+<h2>Collection of Component include folders:</h2>
+  ./RTE/_AutoGuideStick
+  D:/keil5/ARM/PACK/ARM/CMSIS/5.9.0/CMSIS/Core/Include
+  D:/keil5/ARM/PACK/Keil/STM32H5xx_DFP/1.3.0/Drivers/CMSIS/Device/ST/STM32H5xx/Include
+
+<h2>Collection of Component Files used:</h2>
+
+   * Component: ARM::CMSIS:CORE@5.6.0
+      Include file:  CMSIS/Core/Include/tz_context.h
+Build Time Elapsed:  00:00:02
+</pre>
+</body>
+</html>

MDK-ARM/AutoGuideStick/AutoGuideStick.lnp

@@ -0,0 +1,209 @@
+--cpu=Cortex-M33
+"autoguidestick\startup_stm32h563xx.o"
+"autoguidestick\main.o"
+"autoguidestick\tx_initialize_low_level.o"
+"autoguidestick\gpio.o"
+"autoguidestick\gpdma.o"
+"autoguidestick\memorymap.o"
+"autoguidestick\app_threadx.o"
+"autoguidestick\tim.o"
+"autoguidestick\usart.o"
+"autoguidestick\stm32h5xx_it.o"
+"autoguidestick\stm32h5xx_hal_msp.o"
+"autoguidestick\stm32h5xx_hal_timebase_tim.o"
+"autoguidestick\app_azure_rtos.o"
+"autoguidestick\stm32h5xx_hal_tim.o"
+"autoguidestick\stm32h5xx_hal_tim_ex.o"
+"autoguidestick\stm32h5xx_hal_cortex.o"
+"autoguidestick\stm32h5xx_hal_rcc.o"
+"autoguidestick\stm32h5xx_hal_rcc_ex.o"
+"autoguidestick\stm32h5xx_hal_flash.o"
+"autoguidestick\stm32h5xx_hal_flash_ex.o"
+"autoguidestick\stm32h5xx_hal_gpio.o"
+"autoguidestick\stm32h5xx_hal_dma.o"
+"autoguidestick\stm32h5xx_hal_dma_ex.o"
+"autoguidestick\stm32h5xx_hal_pwr.o"
+"autoguidestick\stm32h5xx_hal_pwr_ex.o"
+"autoguidestick\stm32h5xx_hal.o"
+"autoguidestick\stm32h5xx_hal_exti.o"
+"autoguidestick\stm32h5xx_hal_uart.o"
+"autoguidestick\stm32h5xx_hal_uart_ex.o"
+"autoguidestick\system_stm32h5xx.o"
+"autoguidestick\tx_initialize_high_level.o"
+"autoguidestick\tx_initialize_kernel_enter.o"
+"autoguidestick\tx_initialize_kernel_setup.o"
+"autoguidestick\tx_thread_context_restore.o"
+"autoguidestick\tx_thread_context_save.o"
+"autoguidestick\tx_thread_interrupt_control.o"
+"autoguidestick\tx_thread_interrupt_disable.o"
+"autoguidestick\tx_thread_interrupt_restore.o"
+"autoguidestick\tx_thread_schedule.o"
+"autoguidestick\tx_thread_stack_build.o"
+"autoguidestick\tx_thread_system_return.o"
+"autoguidestick\tx_timer_interrupt.o"
+"autoguidestick\tx_thread_stack_error_handler.o"
+"autoguidestick\tx_thread_stack_error_notify.o"
+"autoguidestick\tx_thread_system_resume.o"
+"autoguidestick\tx_block_allocate.o"
+"autoguidestick\tx_block_pool_cleanup.o"
+"autoguidestick\tx_block_pool_create.o"
+"autoguidestick\tx_block_pool_delete.o"
+"autoguidestick\tx_block_pool_info_get.o"
+"autoguidestick\tx_block_pool_initialize.o"
+"autoguidestick\tx_block_pool_prioritize.o"
+"autoguidestick\tx_block_release.o"
+"autoguidestick\tx_byte_allocate.o"
+"autoguidestick\tx_byte_pool_cleanup.o"
+"autoguidestick\tx_byte_pool_create.o"
+"autoguidestick\tx_byte_pool_delete.o"
+"autoguidestick\tx_byte_pool_info_get.o"
+"autoguidestick\tx_byte_pool_initialize.o"
+"autoguidestick\tx_byte_pool_prioritize.o"
+"autoguidestick\tx_byte_pool_search.o"
+"autoguidestick\tx_byte_release.o"
+"autoguidestick\tx_event_flags_cleanup.o"
+"autoguidestick\tx_event_flags_create.o"
+"autoguidestick\tx_event_flags_delete.o"
+"autoguidestick\tx_event_flags_get.o"
+"autoguidestick\tx_event_flags_info_get.o"
+"autoguidestick\tx_event_flags_initialize.o"
+"autoguidestick\tx_event_flags_set.o"
+"autoguidestick\tx_event_flags_set_notify.o"
+"autoguidestick\tx_mutex_cleanup.o"
+"autoguidestick\tx_mutex_create.o"
+"autoguidestick\tx_mutex_delete.o"
+"autoguidestick\tx_mutex_get.o"
+"autoguidestick\tx_mutex_info_get.o"
+"autoguidestick\tx_mutex_initialize.o"
+"autoguidestick\tx_mutex_prioritize.o"
+"autoguidestick\tx_mutex_priority_change.o"
+"autoguidestick\tx_mutex_put.o"
+"autoguidestick\tx_queue_cleanup.o"
+"autoguidestick\tx_queue_create.o"
+"autoguidestick\tx_queue_delete.o"
+"autoguidestick\tx_queue_flush.o"
+"autoguidestick\tx_queue_front_send.o"
+"autoguidestick\tx_queue_info_get.o"
+"autoguidestick\tx_queue_initialize.o"
+"autoguidestick\tx_queue_prioritize.o"
+"autoguidestick\tx_queue_receive.o"
+"autoguidestick\tx_queue_send.o"
+"autoguidestick\tx_queue_send_notify.o"
+"autoguidestick\tx_semaphore_ceiling_put.o"
+"autoguidestick\tx_semaphore_cleanup.o"
+"autoguidestick\tx_semaphore_create.o"
+"autoguidestick\tx_semaphore_delete.o"
+"autoguidestick\tx_semaphore_get.o"
+"autoguidestick\tx_semaphore_info_get.o"
+"autoguidestick\tx_semaphore_initialize.o"
+"autoguidestick\tx_semaphore_prioritize.o"
+"autoguidestick\tx_semaphore_put.o"
+"autoguidestick\tx_semaphore_put_notify.o"
+"autoguidestick\tx_thread_create.o"
+"autoguidestick\tx_thread_delete.o"
+"autoguidestick\tx_thread_entry_exit_notify.o"
+"autoguidestick\tx_thread_identify.o"
+"autoguidestick\tx_thread_info_get.o"
+"autoguidestick\tx_thread_initialize.o"
+"autoguidestick\tx_thread_preemption_change.o"
+"autoguidestick\tx_thread_priority_change.o"
+"autoguidestick\tx_thread_relinquish.o"
+"autoguidestick\tx_thread_reset.o"
+"autoguidestick\tx_thread_resume.o"
+"autoguidestick\tx_thread_shell_entry.o"
+"autoguidestick\tx_thread_sleep.o"
+"autoguidestick\tx_thread_stack_analyze.o"
+"autoguidestick\tx_thread_suspend.o"
+"autoguidestick\tx_thread_system_preempt_check.o"
+"autoguidestick\tx_thread_system_suspend.o"
+"autoguidestick\tx_thread_terminate.o"
+"autoguidestick\tx_thread_time_slice.o"
+"autoguidestick\tx_thread_time_slice_change.o"
+"autoguidestick\tx_thread_timeout.o"
+"autoguidestick\tx_thread_wait_abort.o"
+"autoguidestick\tx_time_get.o"
+"autoguidestick\tx_time_set.o"
+"autoguidestick\txe_block_allocate.o"
+"autoguidestick\txe_block_pool_create.o"
+"autoguidestick\txe_block_pool_delete.o"
+"autoguidestick\txe_block_pool_info_get.o"
+"autoguidestick\txe_block_pool_prioritize.o"
+"autoguidestick\txe_block_release.o"
+"autoguidestick\txe_byte_allocate.o"
+"autoguidestick\txe_byte_pool_create.o"
+"autoguidestick\txe_byte_pool_delete.o"
+"autoguidestick\txe_byte_pool_info_get.o"
+"autoguidestick\txe_byte_pool_prioritize.o"
+"autoguidestick\txe_byte_release.o"
+"autoguidestick\txe_event_flags_create.o"
+"autoguidestick\txe_event_flags_delete.o"
+"autoguidestick\txe_event_flags_get.o"
+"autoguidestick\txe_event_flags_info_get.o"
+"autoguidestick\txe_event_flags_set.o"
+"autoguidestick\txe_event_flags_set_notify.o"
+"autoguidestick\txe_mutex_create.o"
+"autoguidestick\txe_mutex_delete.o"
+"autoguidestick\txe_mutex_get.o"
+"autoguidestick\txe_mutex_info_get.o"
+"autoguidestick\txe_mutex_prioritize.o"
+"autoguidestick\txe_mutex_put.o"
+"autoguidestick\txe_queue_create.o"
+"autoguidestick\txe_queue_delete.o"
+"autoguidestick\txe_queue_flush.o"
+"autoguidestick\txe_queue_front_send.o"
+"autoguidestick\txe_queue_info_get.o"
+"autoguidestick\txe_queue_prioritize.o"
+"autoguidestick\txe_queue_receive.o"
+"autoguidestick\txe_queue_send.o"
+"autoguidestick\txe_queue_send_notify.o"
+"autoguidestick\txe_semaphore_ceiling_put.o"
+"autoguidestick\txe_semaphore_create.o"
+"autoguidestick\txe_semaphore_delete.o"
+"autoguidestick\txe_semaphore_get.o"
+"autoguidestick\txe_semaphore_info_get.o"
+"autoguidestick\txe_semaphore_prioritize.o"
+"autoguidestick\txe_semaphore_put.o"
+"autoguidestick\txe_semaphore_put_notify.o"
+"autoguidestick\txe_thread_create.o"
+"autoguidestick\txe_thread_delete.o"
+"autoguidestick\txe_thread_entry_exit_notify.o"
+"autoguidestick\txe_thread_info_get.o"
+"autoguidestick\txe_thread_preemption_change.o"
+"autoguidestick\txe_thread_priority_change.o"
+"autoguidestick\txe_thread_relinquish.o"
+"autoguidestick\txe_thread_reset.o"
+"autoguidestick\txe_thread_resume.o"
+"autoguidestick\txe_thread_suspend.o"
+"autoguidestick\txe_thread_terminate.o"
+"autoguidestick\txe_thread_time_slice_change.o"
+"autoguidestick\txe_thread_wait_abort.o"
+"autoguidestick\tx_timer_activate.o"
+"autoguidestick\tx_timer_change.o"
+"autoguidestick\tx_timer_create.o"
+"autoguidestick\tx_timer_deactivate.o"
+"autoguidestick\tx_timer_delete.o"
+"autoguidestick\tx_timer_expiration_process.o"
+"autoguidestick\tx_timer_info_get.o"
+"autoguidestick\tx_timer_initialize.o"
+"autoguidestick\tx_timer_system_activate.o"
+"autoguidestick\tx_timer_system_deactivate.o"
+"autoguidestick\tx_timer_thread_entry.o"
+"autoguidestick\txe_timer_activate.o"
+"autoguidestick\txe_timer_change.o"
+"autoguidestick\txe_timer_create.o"
+"autoguidestick\txe_timer_deactivate.o"
+"autoguidestick\txe_timer_delete.o"
+"autoguidestick\txe_timer_info_get.o"
+"autoguidestick\hcble.o"
+"autoguidestick\gps.o"
+"autoguidestick\buzzer.o"
+"autoguidestick\shake_motor.o"
+"autoguidestick\ultrasound.o"
+"autoguidestick\imu.o"
+"autoguidestick\motor.o"
+"autoguidestick\imu948.o"
+"autoguidestick\encoder.o"
+--library_type=microlib --strict --scatter "AutoGuideStick\AutoGuideStick.sct"
+--summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols
+--info sizes --info totals --info unused --info veneers
+--list "AutoGuideStick.map" -o AutoGuideStick\AutoGuideStick.axf

MDK-ARM/AutoGuideStick/AutoGuideStick.sct

@@ -0,0 +1,16 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00200000  {    ; load region size_region
+  ER_IROM1 0x08000000 0x00200000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+  RW_IRAM1 0x20000000 0x000A0000  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+}
+

MDK-ARM/AutoGuideStick/ExtDll.iex

@@ -0,0 +1,2 @@
+[EXTDLL]
+Count=0

MDK-ARM/AutoGuideStick/app_azure_rtos.d

@@ -0,0 +1,44 @@
+autoguidestick/app_azure_rtos.o: ..\AZURE_RTOS\App\app_azure_rtos.c \
+  ..\AZURE_RTOS\App\app_azure_rtos.h ..\Core\Inc\app_threadx.h \
+  ..\Middlewares\ST\threadx\common\inc\tx_api.h \
+  ..\Middlewares\ST\threadx\ports\cortex_m33\ac6\inc\tx_port.h \
+  ..\Core\Inc\tx_user.h D:\keil5\ARM\ARMCLANG\include\stdlib.h \
+  D:\keil5\ARM\ARMCLANG\include\string.h ..\fun\headfile.h \
+  ..\Core\Inc\main.h ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h \
+  ..\Core\Inc\memorymap.h ..\Core\Inc\usart.h ..\Core\Inc\gpio.h \
+  ..\Core\Inc\gpdma.h ..\Core\Inc\tim.h \
+  D:\keil5\ARM\ARMCLANG\include\stdio.h \
+  D:\keil5\ARM\ARMCLANG\include\stdarg.h ..\fun\HCBle.h ..\fun\gps.h \
+  ..\fun\Shake_Motor.h ..\fun\Ultrasound.h ..\fun\Buzzer.h \
+  ..\fun\Motor.h ..\fun\IMU.h ..\fun\imu948.h ..\fun\encoder.h \
+  ..\fun\value.h ..\AZURE_RTOS\App\app_azure_rtos_config.h

MDK-ARM/AutoGuideStick/app_threadx.d

@@ -0,0 +1,44 @@
+autoguidestick/app_threadx.o: ..\Core\Src\app_threadx.c \
+  ..\Core\Inc\app_threadx.h \
+  ..\Middlewares\ST\threadx\common\inc\tx_api.h \
+  ..\Middlewares\ST\threadx\ports\cortex_m33\ac6\inc\tx_port.h \
+  ..\Core\Inc\tx_user.h D:\keil5\ARM\ARMCLANG\include\stdlib.h \
+  D:\keil5\ARM\ARMCLANG\include\string.h ..\fun\headfile.h \
+  ..\Core\Inc\main.h ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h \
+  ..\Core\Inc\memorymap.h ..\Core\Inc\usart.h ..\Core\Inc\gpio.h \
+  ..\Core\Inc\gpdma.h ..\Core\Inc\tim.h \
+  D:\keil5\ARM\ARMCLANG\include\stdio.h \
+  D:\keil5\ARM\ARMCLANG\include\stdarg.h ..\fun\HCBle.h ..\fun\gps.h \
+  ..\fun\Shake_Motor.h ..\fun\Ultrasound.h ..\fun\Buzzer.h \
+  ..\fun\Motor.h ..\fun\IMU.h ..\fun\imu948.h ..\fun\encoder.h \
+  ..\fun\value.h

MDK-ARM/AutoGuideStick/buzzer.d

@@ -0,0 +1,43 @@
+autoguidestick/buzzer.o: ..\fun\Buzzer.c ..\fun\Buzzer.h \
+  ..\fun\headfile.h ..\Core\Inc\main.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h \
+  ..\Core\Inc\memorymap.h ..\Core\Inc\usart.h ..\Core\Inc\gpio.h \
+  ..\Core\Inc\gpdma.h ..\Core\Inc\tim.h ..\Core\Inc\app_threadx.h \
+  ..\Middlewares\ST\threadx\common\inc\tx_api.h \
+  ..\Middlewares\ST\threadx\ports\cortex_m33\ac6\inc\tx_port.h \
+  ..\Core\Inc\tx_user.h D:\keil5\ARM\ARMCLANG\include\stdlib.h \
+  D:\keil5\ARM\ARMCLANG\include\string.h \
+  D:\keil5\ARM\ARMCLANG\include\stdio.h \
+  D:\keil5\ARM\ARMCLANG\include\stdarg.h ..\fun\HCBle.h ..\fun\gps.h \
+  ..\fun\Shake_Motor.h ..\fun\Ultrasound.h ..\fun\Motor.h ..\fun\IMU.h \
+  ..\fun\imu948.h ..\fun\encoder.h ..\fun\value.h

MDK-ARM/AutoGuideStick/encoder.d

@@ -0,0 +1,43 @@
+autoguidestick/encoder.o: ..\fun\encoder.c ..\fun\encoder.h \
+  ..\fun\headfile.h ..\Core\Inc\main.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h \
+  ..\Core\Inc\memorymap.h ..\Core\Inc\usart.h ..\Core\Inc\gpio.h \
+  ..\Core\Inc\gpdma.h ..\Core\Inc\tim.h ..\Core\Inc\app_threadx.h \
+  ..\Middlewares\ST\threadx\common\inc\tx_api.h \
+  ..\Middlewares\ST\threadx\ports\cortex_m33\ac6\inc\tx_port.h \
+  ..\Core\Inc\tx_user.h D:\keil5\ARM\ARMCLANG\include\stdlib.h \
+  D:\keil5\ARM\ARMCLANG\include\string.h \
+  D:\keil5\ARM\ARMCLANG\include\stdio.h \
+  D:\keil5\ARM\ARMCLANG\include\stdarg.h ..\fun\HCBle.h ..\fun\gps.h \
+  ..\fun\Shake_Motor.h ..\fun\Ultrasound.h ..\fun\Buzzer.h \
+  ..\fun\Motor.h ..\fun\IMU.h ..\fun\imu948.h ..\fun\value.h

MDK-ARM/AutoGuideStick/gpdma.d

@@ -0,0 +1,32 @@
+autoguidestick/gpdma.o: ..\Core\Src\gpdma.c ..\Core\Inc\gpdma.h \
+  ..\Core\Inc\main.h ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/gpio.d

@@ -0,0 +1,32 @@
+autoguidestick/gpio.o: ..\Core\Src\gpio.c ..\Core\Inc\gpio.h \
+  ..\Core\Inc\main.h ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/gps.d

@@ -0,0 +1,43 @@
+autoguidestick/gps.o: ..\fun\gps.c ..\fun\gps.h ..\fun\headfile.h \
+  ..\Core\Inc\main.h ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h \
+  ..\Core\Inc\memorymap.h ..\Core\Inc\usart.h ..\Core\Inc\gpio.h \
+  ..\Core\Inc\gpdma.h ..\Core\Inc\tim.h ..\Core\Inc\app_threadx.h \
+  ..\Middlewares\ST\threadx\common\inc\tx_api.h \
+  ..\Middlewares\ST\threadx\ports\cortex_m33\ac6\inc\tx_port.h \
+  ..\Core\Inc\tx_user.h D:\keil5\ARM\ARMCLANG\include\stdlib.h \
+  D:\keil5\ARM\ARMCLANG\include\string.h \
+  D:\keil5\ARM\ARMCLANG\include\stdio.h \
+  D:\keil5\ARM\ARMCLANG\include\stdarg.h ..\fun\HCBle.h \
+  ..\fun\Shake_Motor.h ..\fun\Ultrasound.h ..\fun\Buzzer.h \
+  ..\fun\Motor.h ..\fun\IMU.h ..\fun\imu948.h ..\fun\encoder.h \
+  ..\fun\value.h

MDK-ARM/AutoGuideStick/hcble.d

@@ -0,0 +1,43 @@
+autoguidestick/hcble.o: ..\fun\HCBle.c ..\fun\HCBle.h ..\fun\headfile.h \
+  ..\Core\Inc\main.h ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h \
+  ..\Core\Inc\memorymap.h ..\Core\Inc\usart.h ..\Core\Inc\gpio.h \
+  ..\Core\Inc\gpdma.h ..\Core\Inc\tim.h ..\Core\Inc\app_threadx.h \
+  ..\Middlewares\ST\threadx\common\inc\tx_api.h \
+  ..\Middlewares\ST\threadx\ports\cortex_m33\ac6\inc\tx_port.h \
+  ..\Core\Inc\tx_user.h D:\keil5\ARM\ARMCLANG\include\stdlib.h \
+  D:\keil5\ARM\ARMCLANG\include\string.h \
+  D:\keil5\ARM\ARMCLANG\include\stdio.h \
+  D:\keil5\ARM\ARMCLANG\include\stdarg.h ..\fun\gps.h \
+  ..\fun\Shake_Motor.h ..\fun\Ultrasound.h ..\fun\Buzzer.h \
+  ..\fun\Motor.h ..\fun\IMU.h ..\fun\imu948.h ..\fun\encoder.h \
+  ..\fun\value.h

MDK-ARM/AutoGuideStick/icache.d

@@ -0,0 +1,31 @@
+autoguidestick/icache.o: ..\Core\Src\icache.c ..\Core\Inc\icache.h \
+  ..\Core\Inc\main.h ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  d:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  d:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  d:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  d:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_icache.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/imu.d

@@ -0,0 +1,42 @@
+autoguidestick/imu.o: ..\fun\IMU.c ..\fun\IMU.h ..\fun\headfile.h \
+  ..\Core\Inc\main.h ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h \
+  ..\Core\Inc\memorymap.h ..\Core\Inc\usart.h ..\Core\Inc\gpio.h \
+  ..\Core\Inc\gpdma.h ..\Core\Inc\tim.h ..\Core\Inc\app_threadx.h \
+  ..\Middlewares\ST\threadx\common\inc\tx_api.h \
+  ..\Middlewares\ST\threadx\ports\cortex_m33\ac6\inc\tx_port.h \
+  ..\Core\Inc\tx_user.h D:\keil5\ARM\ARMCLANG\include\stdlib.h \
+  D:\keil5\ARM\ARMCLANG\include\string.h \
+  D:\keil5\ARM\ARMCLANG\include\stdio.h \
+  D:\keil5\ARM\ARMCLANG\include\stdarg.h ..\fun\HCBle.h ..\fun\gps.h \
+  ..\fun\Shake_Motor.h ..\fun\Ultrasound.h ..\fun\Buzzer.h \
+  ..\fun\Motor.h ..\fun\imu948.h ..\fun\encoder.h ..\fun\value.h

MDK-ARM/AutoGuideStick/imu948.d

@@ -0,0 +1,43 @@
+autoguidestick/imu948.o: ..\fun\imu948.c ..\fun\imu948.h \
+  ..\fun\headfile.h ..\Core\Inc\main.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h \
+  ..\Core\Inc\memorymap.h ..\Core\Inc\usart.h ..\Core\Inc\gpio.h \
+  ..\Core\Inc\gpdma.h ..\Core\Inc\tim.h ..\Core\Inc\app_threadx.h \
+  ..\Middlewares\ST\threadx\common\inc\tx_api.h \
+  ..\Middlewares\ST\threadx\ports\cortex_m33\ac6\inc\tx_port.h \
+  ..\Core\Inc\tx_user.h D:\keil5\ARM\ARMCLANG\include\stdlib.h \
+  D:\keil5\ARM\ARMCLANG\include\string.h \
+  D:\keil5\ARM\ARMCLANG\include\stdio.h \
+  D:\keil5\ARM\ARMCLANG\include\stdarg.h ..\fun\HCBle.h ..\fun\gps.h \
+  ..\fun\Shake_Motor.h ..\fun\Ultrasound.h ..\fun\Buzzer.h \
+  ..\fun\Motor.h ..\fun\IMU.h ..\fun\encoder.h ..\fun\value.h

MDK-ARM/AutoGuideStick/main.d

@@ -0,0 +1,43 @@
+autoguidestick/main.o: ..\Core\Src\main.c ..\Core\Inc\app_threadx.h \
+  ..\Middlewares\ST\threadx\common\inc\tx_api.h \
+  ..\Middlewares\ST\threadx\ports\cortex_m33\ac6\inc\tx_port.h \
+  ..\Core\Inc\tx_user.h D:\keil5\ARM\ARMCLANG\include\stdlib.h \
+  D:\keil5\ARM\ARMCLANG\include\string.h ..\fun\headfile.h \
+  ..\Core\Inc\main.h ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h \
+  ..\Core\Inc\memorymap.h ..\Core\Inc\usart.h ..\Core\Inc\gpio.h \
+  ..\Core\Inc\gpdma.h ..\Core\Inc\tim.h \
+  D:\keil5\ARM\ARMCLANG\include\stdio.h \
+  D:\keil5\ARM\ARMCLANG\include\stdarg.h ..\fun\HCBle.h ..\fun\gps.h \
+  ..\fun\Shake_Motor.h ..\fun\Ultrasound.h ..\fun\Buzzer.h \
+  ..\fun\Motor.h ..\fun\IMU.h ..\fun\imu948.h ..\fun\encoder.h \
+  ..\fun\value.h

MDK-ARM/AutoGuideStick/memorymap.d

@@ -0,0 +1,33 @@
+autoguidestick/memorymap.o: ..\Core\Src\memorymap.c \
+  ..\Core\Inc\memorymap.h ..\Core\Inc\main.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/motor.d

@@ -0,0 +1,42 @@
+autoguidestick/motor.o: ..\fun\Motor.c ..\fun\Motor.h ..\fun\headfile.h \
+  ..\Core\Inc\main.h ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h \
+  ..\Core\Inc\memorymap.h ..\Core\Inc\usart.h ..\Core\Inc\gpio.h \
+  ..\Core\Inc\gpdma.h ..\Core\Inc\tim.h ..\Core\Inc\app_threadx.h \
+  ..\Middlewares\ST\threadx\common\inc\tx_api.h \
+  ..\Middlewares\ST\threadx\ports\cortex_m33\ac6\inc\tx_port.h \
+  ..\Core\Inc\tx_user.h D:\keil5\ARM\ARMCLANG\include\stdlib.h \
+  D:\keil5\ARM\ARMCLANG\include\string.h \
+  D:\keil5\ARM\ARMCLANG\include\stdio.h \
+  D:\keil5\ARM\ARMCLANG\include\stdarg.h ..\fun\HCBle.h ..\fun\gps.h \
+  ..\fun\Shake_Motor.h ..\fun\Ultrasound.h ..\fun\Buzzer.h ..\fun\IMU.h \
+  ..\fun\imu948.h ..\fun\encoder.h ..\fun\value.h

MDK-ARM/AutoGuideStick/shake_motor.d

@@ -0,0 +1,43 @@
+autoguidestick/shake_motor.o: ..\fun\Shake_Motor.c ..\fun\Shake_Motor.h \
+  ..\fun\headfile.h ..\Core\Inc\main.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h \
+  ..\Core\Inc\memorymap.h ..\Core\Inc\usart.h ..\Core\Inc\gpio.h \
+  ..\Core\Inc\gpdma.h ..\Core\Inc\tim.h ..\Core\Inc\app_threadx.h \
+  ..\Middlewares\ST\threadx\common\inc\tx_api.h \
+  ..\Middlewares\ST\threadx\ports\cortex_m33\ac6\inc\tx_port.h \
+  ..\Core\Inc\tx_user.h D:\keil5\ARM\ARMCLANG\include\stdlib.h \
+  D:\keil5\ARM\ARMCLANG\include\string.h \
+  D:\keil5\ARM\ARMCLANG\include\stdio.h \
+  D:\keil5\ARM\ARMCLANG\include\stdarg.h ..\fun\HCBle.h ..\fun\gps.h \
+  ..\fun\Ultrasound.h ..\fun\Buzzer.h ..\fun\Motor.h ..\fun\IMU.h \
+  ..\fun\imu948.h ..\fun\encoder.h ..\fun\value.h

MDK-ARM/AutoGuideStick/stm32h5xx_hal.d

@@ -0,0 +1,33 @@
+autoguidestick/stm32h5xx_hal.o: \
+  ..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal.c \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/stm32h5xx_hal_cortex.d

@@ -0,0 +1,33 @@
+autoguidestick/stm32h5xx_hal_cortex.o: \
+  ..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_cortex.c \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/stm32h5xx_hal_dma.d

@@ -0,0 +1,33 @@
+autoguidestick/stm32h5xx_hal_dma.o: \
+  ..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_dma.c \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/stm32h5xx_hal_dma_ex.d

@@ -0,0 +1,33 @@
+autoguidestick/stm32h5xx_hal_dma_ex.o: \
+  ..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_dma_ex.c \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/stm32h5xx_hal_exti.d

@@ -0,0 +1,33 @@
+autoguidestick/stm32h5xx_hal_exti.o: \
+  ..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_exti.c \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/stm32h5xx_hal_flash.d

@@ -0,0 +1,33 @@
+autoguidestick/stm32h5xx_hal_flash.o: \
+  ..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_flash.c \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/stm32h5xx_hal_flash_ex.d

@@ -0,0 +1,33 @@
+autoguidestick/stm32h5xx_hal_flash_ex.o: \
+  ..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_flash_ex.c \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/stm32h5xx_hal_gpio.d

@@ -0,0 +1,33 @@
+autoguidestick/stm32h5xx_hal_gpio.o: \
+  ..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_gpio.c \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/stm32h5xx_hal_icache.d

@@ -0,0 +1,32 @@
+autoguidestick/stm32h5xx_hal_icache.o: \
+  ..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_icache.c \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  d:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  d:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  d:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  d:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_icache.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/stm32h5xx_hal_msp.d

@@ -0,0 +1,32 @@
+autoguidestick/stm32h5xx_hal_msp.o: ..\Core\Src\stm32h5xx_hal_msp.c \
+  ..\Core\Inc\main.h ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/stm32h5xx_hal_pwr.d

@@ -0,0 +1,33 @@
+autoguidestick/stm32h5xx_hal_pwr.o: \
+  ..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_pwr.c \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h

MDK-ARM/AutoGuideStick/stm32h5xx_hal_pwr_ex.d

@@ -0,0 +1,33 @@
+autoguidestick/stm32h5xx_hal_pwr_ex.o: \
+  ..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_pwr_ex.c \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal.h \
+  ..\Core\Inc\stm32h5xx_hal_conf.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_def.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h \
+  D:\keil5\ARM\ARMCLANG\include\math.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h563xx.h \
+  ..\Drivers\CMSIS\Include\core_cm33.h \
+  D:\keil5\ARM\ARMCLANG\include\stdint.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_version.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_compiler.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\cmsis_armclang.h \
+  D:\advance_stick\AutoGuideStick\Drivers\CMSIS\Include\mpu_armv8.h \
+  ..\Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h \
+  D:\keil5\ARM\ARMCLANG\include\stddef.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_rcc_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_gpio_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_dma_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_cortex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_flash_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_pwr_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_tim_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_uart_ex.h \
+  ..\Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_hal_exti.h